Non-volatile memory with selectable hard write

A non-volatile memory circuit comprises:

• an array, wherein the array includes non-volatile memory cells;
• write circuitry coupled to the array, wherein the write circuitry includes a plurality of write drivers and the write circuitry is configured to, in performing a write operation of write data into an addressed memory location of the array, couple each write driver of the plurality of write drivers to a corresponding memory cell of the addressed memory location;
• a hard write control circuitry configured to, for the write operation, provide a hard write indicator to each write driver of the plurality of write drivers;
• wherein the write circuitry is configured to, for each write driver receiving an asserted hard write indicator, perform a hard write of a corresponding memory cell of the addressed memory location for the write operation, and for each write driver receiving a negated hard write indicator, perform a normal write of a corresponding memory cell of the addressed memory location for the write operation, wherein any hard writes and any normal writes for the write operation into the addressed memory location are performed simultaneously.

A method in a non-volatile memory circuit having a memory array with non-volatile memory cells and having a hard write memory, the method comprising:

• performing a write operation to an addressed memory location of the memory array, wherein performing the write operation includes:
• determining if at least one cell of the addressed memory location is indicated as write error prone in the hard write memory;
• if at least one cell is indicated as write error prone in the hard write memory, completing the write operation by performing a hard write of the at least one cell while simultaneously performing a normal write of remaining cells of the addressed memory location of the memory array;
• and
• if at least one cell of the addressed memory location is not indicated as write error prone in the hard write memory, completing the write operation by performing a normal write of all cells of the addressed memory location.