Nonvolatile memory devices, systems and methods with switching charge pump architectures
AssigneeAdesto Technologies Corporation
InventorsStephen Trinh, Duong Vinh Hao, Nguyen Khac Hieu, Hendrik Hartono, John Dinh, Shane Charles Hollmer
Life of this patent
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Abstract
A memory device can include a plurality of banks, each bank including a memory cell array of nonvolatile (NV) memory cells; a plurality of charge pumps, including a first charge pump and second charge pump; and a switch circuit. The switch circuit can be configured to, in a first mode, connect the first charge pump to first circuits of the banks and isolate the second charge pump from the first circuits, and in a second mode, isolate the first charge pump from the first circuits and connect the second charge pump to the first circuits.
Claims16
A memory device, comprising:
- a plurality of banks, each bank including a memory cell array of nonvolatile (NV) memory cells;
- a plurality of charge pumps, including a first charge pump and second charge pump;
- and
- a switch circuit configured to
- in a first mode,
- connect a first pump output node of the first charge pump to X-path circuits and Y-path circuits of the banks and
- isolate a second pump output node of the second charge pump from the Y-path circuits and connect the second pump output node to program circuits, and
- in a second mode,
- isolate the first pump output node from the Y-path circuits while connecting the first pump output node to the X-path circuits and
- connect the second pump output node to the Y-path circuits and the program circuits;
- wherein
- the program circuits are configured to program the NV memory cells to at least one state.
A system, comprising:
- at least one nonvolatile memory cell array including first circuits and second circuits;
- a plurality of charge pumps, including a first charge pump with a first pump output and a second charge pump with a second pump output;
- and
- a switch circuit, disposed between the charge pumps and the at least one nonvolatile memory cell array, and configurable into at least a first state and a second state in response to configuration data,
- the first state conductively connecting the first and second pump outputs to form a common node that enables current paths between the common node and the first and second circuits, and
- the second state electrically isolating the first and second pump outputs, including
- disabling the current path between the first pump output and the second circuits while enabling the current path between the first pump output and the first circuits and
- disabling the current path between the second pump output and the first circuits while enabling the current path between the second pump output and the second circuits.
A method, comprising:
- by operation of switch circuits,
- connecting a first charge pump to first memory array circuits and second memory array circuits, first charge pump being disconnected from third memory array circuits, and
- connecting a second charge pump to third memory array circuits and disconnecting the second charge pump from the first memory array circuits;
- and
- in response to first configuration data, by operation of the switch circuits, isolating the first charge pump from the first memory array circuits while the first charge pump remains connected to the second memory array circuits and connecting the second charge pump to the first memory array circuits;
- wherein
- the switch circuits, first and second charge pumps, and first, second and third memory array circuits are formed in a same substrate of a nonvolatile memory (NVM) integrated circuit (IC) device.
Dependencies are inferred from the claim text.