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US 11,050,416 B1Granted
Implementing process, voltage, and/or temperature-insensitive resistance in complementary metal-oxide-semiconductors using a short-duty-clock cycle
AssigneeInvenSense, Inc.
InventorsJialin Liu, Ming He, Richelle Smith
Life of this patent
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Abstract
Implementation of large temperature-insensitive resistance in CMOS using short-duty-clock cycle is provided herein. Operations of a method can comprise boosting a resistance level of a switched-resistor circuit to a defined resistance level. The boosting can comprise using a short-duty-cycle clock to facilitate the boosting. Also provided is a sensor system that can comprise a short-duty-cycle clock and a switched-resistor circuit. The short-duty cycle clock boosts a resistance level of the switched-resistor circuit to a defined resistance level.
Claims16
A sensor system, comprising:
- a short-duty-cycle clock;
- and
- a switched-resistor circuit, wherein the short-duty cycle clock boosts a resistance level of the switched-resistor circuit to a defined resistance level, and wherein the short-duty-cycle clock comprises a short-duty-cycle clock generator comprising:
- a programmable resistor-capacitor delay unit comprising a plurality of resistors and a plurality of switches,
- a group of inverters, and
- a NAND gate;
- and
- wherein the switched-resistor circuit comprises:
- a resistor, and
- a set of switches, wherein the resistor and the set of switches are in a series configuration.
7 more elements
A method, comprising:
- boosting a resistance level of a switched-resistor circuit to a defined resistance level, wherein the boosting comprises using a short-duty-cycle clock to facilitate the boosting, wherein the switched-resistor circuit comprises a resistor and a set of switches, wherein the resistor and the set of switches are in a series configuration;
- and
- retaining a constant frequency value over a plurality of temperature values.
Dependencies are inferred from the claim text.