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US 11,043,960 B2Granted
Sigma-delta analog-to-digital converter circuit with correction for mismatch error introduced by the feedback digital-to-analog converter
AssigneeSTMicroelectronics International N.V.
InventorsAnkur Bal, Rupesh Singh
Life of this patent
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Abstract
A sigma-delta modulator includes an N-bit quantization circuit that generates a stream of N-bit code words and a feedback signal path with an N-bit DAC circuit, having a non-ideal operation due to mismatch error, that converts the stream of N-bit code words to generate a feedback signal. A digital DAC copy circuit provides a digital replication of the N-bit DAC circuit. The digital replication accounts for the non-ideal operation of the N-bit DAC circuit 126 due to mismatch error, and converts the stream of N-bit code words to generate a stream of P-bit code words, where P>N, that are functionally equivalent to the feedback signal output from the N-bit DAC circuit.
Claims28
A sigma-delta modulator circuit, comprising:
- a differencing circuit having a first input configured to receive an input signal and a second input configured to receive a feedback signal and an output configured to generate a difference signal;
- a K-th order loop filter circuit configured to filter the difference signal and generate a change signal;
- an N-bit quantization circuit configured to sample the change signal at a sampling frequency rate, quantize the sampled change signal and generate a stream of N-bit code words;
- an N-bit digital-to-analog converter (DAC) circuit configured to convert the stream of N-bit code words to generate the feedback signal, wherein the N-bit DAC circuit has a non-ideal operation due to mismatch error that introduces an analog DAC error in the feedback signal;
- and
- a digital DAC copy circuit that provides a digital replication of the N-bit DAC circuit, said digital replication accounting for the non-ideal operation of the N-bit DAC circuit due to mismatch error, the digital DAC copy circuit configured to convert the stream of N-bit code words to output a stream of P-bit code words, where P>N, that provide a digital value equivalent to an analog value of the feedback signal plus the analog DAC error that is output from the N-bit DAC circuit.
3 more elements
A sigma-delta modulator circuit, comprising:
- a differencing circuit having a first input configured to receive an input signal and a second input configured to receive a feedback signal and an output configured to generate a difference signal;
- a K-th order loop filter circuit configured to filter the difference signal and generate a change signal;
- an N-bit quantization circuit configured to sample the change signal at a sampling frequency rate, quantize the sampled change signal and generate a stream of N-bit code words;
- an N-bit digital-to-analog converter (DAC) circuit configured to convert the stream of N-bit code words to generate the feedback signal, wherein the N-bit DAC circuit has a non-ideal operation due to mismatch error;
- and
- a digital DAC copy circuit that provides a digital replication of the N-bit DAC circuit, said digital replication accounting for the non-ideal operation of the N-bit DAC circuit due to mismatch error, the digital DAC copy circuit configured to convert the stream of N-bit code words to output a stream of P-bit code words, where P>N, that are functionally equivalent to the feedback signal output from the N-bit DAC circuit;
- and
- a calibration circuit configured to program the digital DAC copy circuit to provide the digital replication of the N-bit DAC circuit, wherein the calibration circuit comprises:
- an estimation N-bit DAC circuit;
- a further differencing circuit configured to generate the feedback signal as a difference between a first signal output from the N-bit DAC circuit and a second signal output from the estimation N-bit DAC circuit;
- a first multiplexing circuit having a first input configured to receive the stream of N-bit code words and a second input configured to receive an N-bit calibration code word,
- wherein an output of the first multiplexing circuit is applied to an input of the N-bit DAC circuit;
- a second multiplexing circuit having a first input configured to receive an N-bit null code word and a second input configured to receive the stream of N-bit code words, wherein an output of the second multiplexing circuit is applied to an input of the estimation N-bit DAC circuit;
- and
- a control and processing circuit having a first input configured to receive the stream of N-bit code words and an output configured to generate a programming signal for programming the digital DAC copy circuit, wherein the control and processing circuit controls the first and second multiplexing circuits in a calibration mode to select the second inputs, apply a value for the N-bit calibration code word, and process the stream of N-bit code words in response to the applied value to determine the mismatch error of the N-bit DAC circuit for the applied value in order to program the digital DAC copy circuit to provide the digital replication.
12 more elements
A sigma-delta modulator circuit, comprising:
- a differencing circuit having a first input configured to receive an input signal and a second input configured to receive a feedback signal and an output configured to generate a difference signal;
- a K-th order loop filter circuit configured to filter the difference signal and generate a change signal;
- an N-bit quantization circuit configured to sample the change signal at a sampling frequency rate, quantize the sampled change signal and generate a stream of N-bit code words;
- an N-bit digital-to-analog converter (DAC) circuit configured to convert the stream of N-bit code words to generate the feedback signal, wherein the N-bit DAC circuit has a non-ideal operation due to mismatch error that introduces an analog DAC error in the feedback signal;
- and
- a digital DAC copy circuit that provides a digital replication of the N-bit DAC circuit, said digital replication accounting for the non-ideal operation of the N-bit DAC circuit due to mismatch error, the digital DAC copy circuit configured to convert the stream of N-bit code words to output a stream of P-bit code words, where P>N, each P-bit code word comprising an addition of:
- a first digital code corresponding to an ideal output of the N-bit DAC circuit in response to the N-bit code word;
- plus
- a second digital code corresponding to the analog DAC error of the N-bit DAC circuit in response to the N-bit code word.
6 more elements
A sigma-delta modulator circuit, comprising:
- a differencing circuit having a first input configured to receive an input signal and a second input configured to receive a feedback signal and an output configured to generate a difference signal;
- a K-th order loop filter circuit configured to filter the difference signal and generate a change signal;
- an N-bit quantization circuit configured to sample the change signal at a sampling frequency rate, quantize the sampled change signal and generate a stream of N-bit code words;
- an N-bit digital-to-analog converter (DAC) circuit configured to convert the stream of N-bit code words to generate the feedback signal, wherein the N-bit DAC circuit has a non-ideal operation due to mismatch error;
- and
- a digital DAC copy circuit that provides a digital replication of the N-bit DAC circuit, said digital replication accounting for the non-ideal operation of the N-bit DAC circuit due to mismatch error, the digital DAC copy circuit configured to convert the stream of N-bit code words to output a stream of P-bit code words, where P>N, each P-bit code word comprising a combination of:
- a first digital code corresponding to an ideal output of the N-bit DAC circuit in response to the N-bit code word;
- a second digital code corresponding to unit element error of the N-bit DAC circuit in response to the N-bit code word;
- a calibration circuit configured to program the digital DAC copy circuit to provide the digital replication of the N-bit DAC circuit, wherein the calibration circuit comprises:
- an estimation N-bit DAC circuit;
- a further differencing circuit configured to generate the feedback signal as a difference between a first signal output from the N-bit DAC circuit and a second signal output from the estimation N-bit DAC circuit;
- a first multiplexing circuit having a first input configured to receive the stream of N-bit code words and a second input configured to receive an N-bit calibration code word, wherein an output of the first multiplexing circuit is applied to an input of the N-bit DAC circuit;
- a second multiplexing circuit having a first input configured to receive an N-bit null code word and a second input configured to receive the stream of N-bit code words, wherein an output of the second multiplexing circuit is applied to an input of the estimation N-bit DAC circuit;
- and
- a control and processing circuit having a first input configured to receive the stream of N-bit code words and an output configured to generate a programming signal for programming the digital DAC copy circuit, wherein the control and processing circuit controls the first and second multiplexing circuits in a calibration mode to select the second inputs, apply a value for the N-bit calibration code word, and process the stream of N-bit code words in response to the applied value to determine unit element error of the N-bit DAC circuit for the applied value.
12 more elements
A sigma-delta modulator circuit, comprising:
- a differencing circuit having a first input configured to receive an input signal and a second input configured to receive a feedback signal and an output configured to generate a difference signal;
- a K-th order loop filter circuit configured to filter the difference signal and generate a change signal;
- an N-bit quantization circuit configured to sample the change signal at a sampling frequency rate, quantize the sampled change signal and generate a stream of N-bit code words;
- an N-bit digital-to-analog converter (DAC) circuit configured to convert the stream of N-bit code words to generate the feedback signal, wherein the N-bit DAC circuit has a non-ideal operation due to mismatch error;
- and
- a digital DAC copy circuit that provides a digital replication of the N-bit DAC circuit, said digital replication accounting for the non-ideal operation of the N-bit DAC circuit due to mismatch error, the digital DAC copy circuit configured to convert the stream of N-bit code words to output a stream of P-bit code words, where P>N, that are functionally equivalent to the feedback signal output from the N-bit DAC circuit;
- a calibration circuit configured to program the digital DAC copy circuit to provide the digital replication of the N-bit DAC circuit, wherein the calibration circuit comprises:
- a multiplexing circuit having a first input configured to receive the stream of N-bit code words and a second input configured to receive an N-bit calibration code word, wherein an output of the first multiplexing circuit is applied to an input of the N-bit DAC circuit;
- and
- a control and processing circuit having a first input configured to receive the stream of N-bit code words and an output configured to generate a programming signal for programming the digital DAC copy circuit, wherein the control and processing circuit controls the multiplexing circuit in a calibration mode to select the second input, apply a value for the N-bit calibration code word, and process the stream of N-bit code words in response to the applied value to determine the mismatch error of the N-bit DAC circuit for the applied value in order to program the digital DAC copy circuit to provide the digital replication.
7 more elements
Dependencies are inferred from the claim text.