Resistive memory device having a template layer
Assignee4Ds Memory, Limited
InventorSeshubabu Desu
Life of this patent
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Abstract
An electronic storage memory device is disclosed. The memory device includes a first conductive layer, and also includes a memory layer connected to the first conductive layer, where the memory layer has a variable resistance, and where no amorphous layer exists between the first conductive layer and the memory layer.
Claims22
A memory device, comprising:
- a first conductive layer;
- and
- a memory layer connected to the first conductive layer, wherein the memory layer has a variable resistance, and wherein no amorphous layer exists between the first conductive layer and the memory layer.
A method of manufacturing a memory device, the method comprising:
- forming a first conductive layer;
- and
- connecting a memory layer to the first conductive layer, wherein the memory layer has a variable resistance, and wherein no amorphous layer exists between the first conductive layer and the memory layer.
A method of using a memory device, the memory device comprising a first conductive layer, a memory layer connected to the first conductive layer, the memory layer having a variable resistance, wherein no amorphous layer exists between the first conductive layer and the memory layer, the method comprising:
- applying a first voltage difference across the first conductive layer and the memory layer, whereby an electric field is generated in the memory layer, and such that a resistivity state of the memory layer is changed;
- applying a second voltage difference across the first conductive layer and the memory layer;
- while the second voltage difference is applied, causing a first current to be conducted through an interface between the first conductive layer and the memory layer;
- and
- determining the resistivity state of the memory layer based on the second voltage difference and the first current.
Dependencies are inferred from the claim text.