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AssigneeAcorn Semi, LLC
InventorsDaniel E. Grupp, Daniel J. Connelly
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A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.
A transistor, comprising at least one electrical junction having a semiconductor channel region comprising an undoped semiconductor material, a metal source/drain contact to the channel region, and an interface layer disposed between the semiconductor channel region and the metal source/drain contact, the interface layer comprising a material that passivates the semiconductor channel region.
A method of fabricating an electrical junction in a transistor, comprising forming a portion of a metal source adjacent a semiconductor channel and subsequently forming an interface layer between the semiconductor channel and the portion of the metal source, the interface layer comprising a passivation layer and a separation layer, the passivation layer comprising a passivation material selected from the group consisting of a hydride, a nitride, an arsenide, an oxide and a fluoride of a material comprising the semiconductor channel.
An electrical junction in a transistor, comprising a metal source or drain, a semiconductor channel, and an interface layer between the semiconductor channel and the metal source or drain, the interface layer being disposed at least partially subjacent a gate of the transistor and comprising a passivation layer formed of a passivation material and a separation layer formed of a nitride.
A transistor, comprising at least one electrical junction having a semiconductor channel region, a metal source/drain contact to the channel region, and an interface layer disposed between the semiconductor channel region and the metal source/drain contact, the interface layer comprising a passivation layer and a separation layer, the passivation layer comprising a material that passivates the semiconductor channel region selected from the group consisting of a nitride, an arsenide, an oxide, and a fluoride of a material comprising the semiconductor channel region.
A transistor, comprising at least one electrical junction having a semiconductor channel region, a metal source/drain contact to the channel region, and an interface layer disposed between the semiconductor channel region and the metal source/drain contact, the interface layer comprising a material that passivates the semiconductor channel region selected from the group consisting of a nitride, an arsenide, an oxide, and a fluoride of a material comprising the semiconductor channel region and having a thickness of a monolayer.
A method of fabricating an electrical junction in a transistor, comprising forming a portion of a metal source adjacent a semiconductor channel and subsequently forming an interface layer between the semiconductor channel and the portion of the metal source, the interface layer comprising a monolayer passivation layer of a passivation material selected from the group consisting of a hydride, a nitride, an arsenide, an oxide and a fluoride of a material comprising the semiconductor channel.
Dependencies are inferred from the claim text.