Active gyrator circuit in one-pair ethernet with PoDL
AssigneeAnalog Devices International Unlimited Company
InventorsAndrew J. Gardner, Heath Stewart, Gitesh Bhagwat
Life of this patent
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Abstract
A PoDL system uses a gyrator for DC coupling of DC power from a PSE to a wire pair, and/or decoupling DC power from a wire pair for a PD. The gyrators obviate the use of discrete inductors for DC-coupling/decoupling and can be formed as an integrated circuit. The gyrators use a small integrated capacitor and invert and multiply the capacitor effect to emulate an inductor. The gyrators present a high impedance to AC current and a low impedance to DC current. Various gyrator designs, such as positive and negative polarity gyrators, and configurations are disclosed. Gyrators are described with analog current limit and power switch control, so multiple functions are integrated on the same IC chip.
Claims20
A Power over Data Lines (PoDL) circuit for connection to a first conductor and a second conductor comprising:
- a first transceiver having a first terminal and a second terminal, the first transceiver for transmitting differential data signals over the first conductor and the second conductor and receiving differential data signals from the first conductor and the second conductor;
- a first AC-coupling device coupled in series between the first terminal and the first conductor;
- a second AC-coupling device coupled in series between the second terminal and the second conductor;
- a common mode choke (CMC) coupled in series between the first AC-coupling device and the first conductor, and coupled in series between the second AC-coupling device and the second conductor;
- a DC power source having a third terminal and a fourth terminal;
- and
- a first gyrator formed in an integrated circuit (IC) and including a capacitor coupled to a transistor of the first gyrator, the first gyrator being coupled between the third terminal of the DC power source and the first conductor with the capacitor of the first gyrator coupled to the third terminal of the DC power source.
A method performed by a Power over Data Lines (PoDL) circuit comprising:
- providing DC power and differential data over a first conductor and a second conductor;
- transmitting differential data signals over the first conductor and the second conductor and receiving differential data signals from the first conductor and the second conductor by a first transceiver having a first terminal and a second terminal;
- blocking DC voltage by a first AC-coupling device coupled in series between the first terminal and the first conductor;
- blocking the DC voltage by a second AC-coupling device coupled in series between the second terminal and the second conductor;
- attenuating common mode noise by a common mode choke (CMC) coupled in series between the first AC-coupling device and the first conductor, and coupled in series between the second AC-coupling device and the second conductor;
- supplying DC power by a DC power source having a third terminal and a fourth terminal;
- and
- attenuating the differential data signals and passing the DC power by a first gyrator formed in an integrated circuit (IC) and including a capacitor coupled to a transistor of the first gyrator, the first gyrator being coupled between the third terminal of the DC power source and the first conductor with the capacitor coupled to the third terminal of the DC power source.
Dependencies are inferred from the claim text.