# US 11,030,088 B2 · Pseudo main memory system

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,030,088 B2
- Document ID: US11030088B2
- Status: Granted
- Kind: B2
- Application number: 16/600,313
- Filed: 2019-10-11
- Published: 2020-02-06
- Granted: 2021-06-08
- Earliest claimed: 2016-07-29
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Krishna T. Malladi; Jongmin Gim; Hongzhong Zheng
- Web page: https://patentgrep.com/patent/US11030088B2

## CPC

- G06F 12/023: {Free address space management}
- G06F 13/1668: {Details of memory controller}
- G06F 12/121: using replacement algorithms
- G06F 2212/251: Local memory within processor subsystem
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A pseudo main memory system. The system includes a memory adapter circuit for performing memory augmentation using compression, deduplication, and/or error correction. The memory adapter circuit is connected to a memory, and employs the memory augmentation methods to increase the effective storage capacity of the memory. The memory adapter circuit is also connected to a memory bus and implements an NVDIMM-F or modified NVDIMM-F interface for connecting to the memory bus.

## Claims

### Claim 1

A system comprising:
a processor;
a memory system comprising:
an adapter module; and
a first memory; and
a second memory connected to the processor through a management module,
wherein the adapter module has a first interface connected to the processor and a second interface connected to the first memory,
wherein the adapter module is configured to store data in, and retrieve data from, the first memory, utilizing a change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to a ratio,
wherein the adapter module is further configured to estimate the ratio as an estimated ratio, and
wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.

### Claim 2 (depends on 1)

The system of claim 1, wherein the change comprises at least one of:
compression;
deduplication; and
error correction.

### Claim 3 (depends on 1)

The system of claim 1, wherein the first interface is a second generation or higher generation double data rate synchronous dynamic random-access interface.

### Claim 4 (depends on 3)

The system of claim 3, wherein the second interface is a second generation or higher generation double data rate synchronous dynamic random-access interface.

### Claim 5 (depends on 3)

The system of claim 3, wherein the first interface is an NVDIMM-F interface, and the system is configured to operate the memory system as a block device.

### Claim 6 (depends on 1)

The system of claim 1, wherein the processor is connected to the adapter module through the management module.

### Claim 7 (depends on 1)

The system of claim 1, wherein the first memory is a dynamic random-access memory and the second interface is a second generation or higher generation double data rate synchronous dynamic random-access memory interface.

### Claim 8 (depends on 1)

The system of claim 1, wherein the adapter module is a single integrated circuit configured to perform at least one of:
compression;
deduplication; and
error correction.

### Claim 9 (depends on 1)

The system of claim 1, wherein the second memory is connected to the management module through a third interface, the third interface being a second generation or higher generation double data rate synchronous dynamic random-access memory interface.

### Claim 10 (depends on 1)

The system of claim 1, wherein the processor is configured to maintain a page cache in the second memory,
wherein the processor is configured to call a cleancache function for clean pages when evicting the clean pages from the page cache, the cleancache function being configured to store the clean pages:
in the first memory when sufficient space is available in the first memory; and
in persistent storage otherwise.

### Claim 11 (depends on 10)

The system of claim 10, wherein the cleancache function is configured to assess that the sufficient space is available in the first memory based on the estimated ratio.

### Claim 12 (depends on 1)

The system of claim 1, wherein the processor is configured to maintain a user memory space in the second memory, and
the processor is configured to call a frontswap function for dirty pages when evicting the dirty pages from the user memory space, the frontswap function being configured to store the dirty pages:
in the first memory when sufficient space is available in the first memory; and
in persistent storage otherwise.

### Claim 13 (depends on 12)

The system of claim 12, wherein the frontswap function is configured to assess that the sufficient space is available in the first memory based on the estimated ratio.

### Claim 14 (depends on 1)

The system of claim 1, wherein the processor is configured to:
execute one or more applications, and
in response to an application of the one or more applications to a sysinfo function, return:
a value for a total available memory based on a size of the first memory and a size of the second memory, and
a value for a total free memory based on an amount of the free memory in the first memory and an amount of free memory in the second memory.

### Claim 15 (depends on 14)

The system of claim 14, wherein the value for the total free memory is a sum of
the amount of free memory in the second memory, and
a product of a minimum ratio and the amount of the free memory in the first memory, the minimum ratio being:
the function of the augmentation ratios for the data stored in the first memory over a set interval of time when the set interval of time has elapsed since system startup, and
2.0 otherwise.

### Claim 16

A method for operating a computer system, the computer system comprising:
a processor;
a memory system comprising:
an adapter module; and
a first memory; and
a second memory connected to the processor through a management module,
the adapter module having a first interface connected to the processor and a second interface connected to the first memory, and
the method comprising storing data in, and retrieving data from, the first memory, utilizing change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to an ratio,
wherein the adapter module is configured to estimate the ratio as an estimated ratio, and
wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.

### Claim 17 (depends on 16)

The method of claim 16, wherein the change comprises at least one of:
compression;
deduplication; and
error correction.

### Claim 18 (depends on 16)

The method of claim 16, comprising using the memory system as a block device operable with an NVDIMM-F protocol.

### Claim 19 (depends on 16)

The method of claim 16, wherein the adapter module is a single integrated circuit configured to perform at least one of:
compression;
deduplication; and
error correction.

### Claim 20

A system comprising:
a processor;
a memory system comprising:
a first memory; and
memory adapter means for storing data in, and retrieving data from, the first memory, utilizing change of a storage capacity of the first memory, the change being configured to modify free memory of the first memory according to a ratio, the memory adapter means being configured to estimate the ratio as an estimated ratio,
the memory adapter means having a first interface connected to the processor and a second interface connected to the first memory,
the first interface being an NVDIMM-F interface, and
the system being configured to operate the memory system as a block device,
wherein the system further comprises:
a second memory connected to the processor through a management module,
wherein the processor is further configured to assess that sufficient space is available in the first memory based on the estimated ratio, the estimated ratio being a function of augmentation ratios for data stored in the first memory over an interval of time.