# US 11,030,075 B2 · Efficient register breakpoints > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,030,075 B2 - Document ID: US11030075B2 - Status: Granted - Kind: B2 - Application number: 16/191,293 - Filed: 2018-11-14 - Published: 2020-05-14 - Granted: 2021-06-08 - Earliest claimed: 2018-11-14 - Assignees: Microsoft Technology Licensing, LLC - Applicants: Microsoft Technology Licensing, LLC - Inventors: Jordi Mola - Web page: https://patentgrep.com/patent/US11030075B2 ## CPC - G06F 11/3624: {by performing operations on the source code, e.g. via a compiler} - G06F 11/3648: {using additional hardware} - G06F 11/3636: {by tracing the execution of the program} - G06F 11/3644: {by instrumenting at runtime} - G06F 11/3698: Environments for analysis, debugging or testing of software - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Efficient register breakpoint checks rely on initiating an event based on an access to a register. Initiating the event can include, based on decoding a machine code instruction, identifying one or more registers that a machine code instruction could touch, and inserting an identification of the touched registers into a stream of executable operations for the machine code instruction. Then, while executing the executable operations, these registers can be compared with a register breakpoint collection. An event can be generated when one of these registers is in the register breakpoint collection. The event might trigger a conditional analysis, an execution break, and/or logging. In some implementations, the event might enable lifetime and/or taint analysis by removing a register from a monitoring collection if the executable operations write to the register, or by adding a destination of a read to the monitoring collection if the executable operations read from the register. ## Claims ### Claim 1 A method, implemented at a computer system that includes one or more processors, for performing a register breakpoint check, the method comprising: decoding a machine code instruction that is a subject of a debugging session; based on the decoding, identifying one or more registers that the machine code instruction could potentially touch during execution of the machine code instruction, including identifying a register storing a processor flag that could be affected by execution of the machine code instruction, and inserting an identification of the identified one or more registers into a stream of executable operations for the machine code instruction; subsequent to inserting the identification of the identified one or more registers into the stream of executable operations for the machine code instruction, executing the machine code instruction by executing the executable operations for the machine code instruction; and after executing the executable operations for the machine code instruction, identify, from the identification of the identified one or more registers that was inserted into the stream of executable operations for the machine code instruction, a particular register that was actually touched by execution of the executable operations for the machine code instruction, the particular register comprising the register storing the processor flag and which was affected by execution of the executable operations for the machine code instruction; and perform at least the following for the touched particular register: compare the particular register with a register breakpoint collection; and generate an event when the particular register is in the register breakpoint collection. ### Claim 2 (depends on 1) The method of claim 1, wherein the method is implemented by an emulator. ### Claim 3 (depends on 1) The method of claim 1, wherein the event triggers at least one of an execution break or logging of the event. ### Claim 4 (depends on 1) The method of claim 1, wherein the event triggers an analysis of one or more conditions specified for the touched particular register, and wherein the event triggers at least one of an execution break or logging of the event when at least one of the one or more conditions is met. ### Claim 5 (depends on 4) The method of claim 4, wherein the one or more conditions include at least one of a read condition, a write condition, or a register value condition. ### Claim 6 (depends on 1) The method of claim 1, wherein, based at least on the executable operations writing to the particular register, the event causes the particular register to be removed from a monitoring collection. ### Claim 7 (depends on 1) The method of claim 1, wherein, based at least on the executable operations writing to the particular register, the event causes a lifetime corresponding to the particular register to terminate. ### Claim 8 (depends on 1) The method of claim 1, wherein, based at least on the executable operations reading from the particular register, the event causes a destination of the read to be added to a monitoring collection. ### Claim 9 (depends on 1) The method of claim 1, wherein, based at least on the executable operations reading from the particular register, the event causes a lifetime corresponding to the register to be extended to a destination. ### Claim 10 (depends on 1) The method of claim 1, wherein the register breakpoint collection associates at least one register with one or more entity lifetimes. ### Claim 11 A computer system, comprising: one or more processors; and one or more computer-readable media having stored thereon computer-executable instructions that are executable by the one or more processors to cause the computer system to perform a register breakpoint check, the computer-executable instructions including instructions that are executable by the one or more processors to perform at least: decode a machine code instruction that is a subject of a debugging session; based on the decoding, identify one or more registers that the machine code instruction could potentially touch during execution of the machine code instruction, including identifying a register storing a processor flag that could be affected by execution of the machine code instruction, and insert an identification of the identified one or more registers into a stream of executable operations for the machine code instruction; subsequent to inserting the identification of the identified one or more registers into the stream of executable operations for the machine code instruction, executing the machine code instruction by executing the executable operations for the machine code instruction; and after executing the executable operations for the machine code instruction, identify, from the identification of the identified one or more registers that was inserted into the stream of executable operations for the machine code instruction, a particular register that was actually touched by execution of the executable operations for the machine code instruction, the particular register comprising the register storing the processor flag and which was affected by execution of the executable operations for the machine code instruction; and perform at least the following for the touched particular register: compare the particular register with a register breakpoint collection; and generate an event when the particular register is in the register breakpoint collection. ### Claim 12 (depends on 11) The computer system of claim 11, wherein executing the machine code instruction comprises executing the machine code instruction at an emulated processor. ### Claim 13 (depends on 11) The computer system of claim 11, wherein the event triggers at least one of an execution break or logging of the event. ### Claim 14 (depends on 11) The computer system of claim 11, wherein the event triggers an analysis of one or more conditions specified for the particular register, and wherein the event triggers at least one of an execution break or logging of the event when at least one of the one or more conditions is met. ### Claim 15 (depends on 14) The computer system of claim 14, wherein the one or more conditions include at least one of a read condition, a write condition, or a register value condition. ### Claim 16 (depends on 11) The computer system of claim 11, wherein based at least on the executable operations writing to the particular register, the event causes the particular register to be removed from a monitoring collection and causes a lifetime corresponding to the particular register to terminate. ### Claim 17 (depends on 11) The computer system of claim 11, wherein, based at least on the executable operations reading from the particular register, the event causes a destination of the read to be added to a monitoring collection and causes a lifetime corresponding to the particular register to be extended to the destination. ### Claim 18 A method, implemented at a computer system that includes one or more processors, for performing a register breakpoint check and enabling lifetime analysis, the method comprising: decoding a machine code instruction that is a subject of a debugging session; based on the decoding, identifying one or more registers that the machine code instruction could potentially touch during execution of the machine code instruction, including identifying a register storing a processor flag that could be affected by execution of the machine code instruction, and inserting an identification of the identified one or more registers into a stream of executable operations for the machine code instruction; subsequent to inserting the identification of the identified one or more registers into the stream of executable operations for the machine code instruction, executing the machine code instruction by executing the executable operations for the machine code instruction; and after executing the executable operations for the machine code instruction, identify, from the identification of the identified one or more registers that was inserted into the stream of executable operations for the machine code instruction, a particular register that was actually touched by execution of the executable operations for the machine code instruction, the particular register comprising the register storing the processor flag and which was affected by execution of the executable operations for the machine code instruction; and perform at least the following for the touched particular register: comparing the particular register with a register breakpoint collection; generating an event when the particular register is in the register breakpoint collection, the event performing at least one of: based at least on the executable operations writing to the particular register, removing the particular register from a monitoring collection and noting a lifetime termination in a lifetime structure; or based at least on the executable operations reading from the particular register, adding a destination of the read to the monitoring collection and extending a lifetime in the lifetime structure to the destination. ### Claim 19 (depends on 18) The method of claim 18, wherein the destination comprises one of a destination register or a destination memory location.