# US 11,029,890 B1 · Compound feature generation in classification of error rate of data retrieved from memory cells > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,029,890 B1 - Document ID: US11029890B1 - Status: Granted - Kind: B1 - Application number: 16/807,063 - Filed: 2020-03-02 - Granted: 2021-06-08 - Earliest claimed: 2020-03-02 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Sivagnanam Parthasarathy; James Fitzpatrick; Patrick Robert Khayat; AbdelHakim S. Alhussien - Web page: https://patentgrep.com/patent/US11029890B1 ## CPC - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G11C 11/5642: {Sensing or reading circuits; Data output circuits} - G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G11C 7/02: with means for avoiding parasitic signals - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically} - G11C 29/028: {with adaption or trimming of parameters} - G11C 29/44: Indication or identification of errors, e.g. for repair - G11C 29/52: Protection of memory contents; Detection of errors in memory contents - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/10: Programming or data input circuits - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A memory sub-system configured to: measure a plurality of sets of signal and noise characteristics of a group of memory cells in a memory device; determine a plurality of optimized read voltages of the group of memory cells from the plurality of sets of signal and noise characteristics respectively; generate features from the plurality of sets of signal and noise characteristics, including at least one compound feature generated from the plurality of sets of signal and noise characteristics; generate, using the features, a classification of a bit error rate of data retrievable from the group of memory cells; and control an operation to read the group of memory cells based on the classification. ## Claims ### Claim 1 A method, comprising: measuring a plurality of sets of signal and noise characteristics of a group of memory cells in a memory device; determining a plurality of optimized read voltages of the group of memory cells from the plurality of sets of signal and noise characteristics respectively; generating features from the plurality of sets of signal and noise characteristics, the features including at least one compound feature generated from the plurality of sets of signal and noise characteristics; generating, using the features, a classification of a bit error rate of data retrievable from the group of memory cells; and controlling an operation to read the group of memory cells based on the classification. ### Claim 2 (depends on 1) The method of claim 1, wherein the generating of the compound feature is at least in part concurrent with the measuring of the plurality of sets of signal and noise characteristics of the group of memory cells. ### Claim 3 (depends on 2) The method of claim 2, wherein the plurality of sets of signal and noise characteristics of the group of memory cells are measured in an ascending order of the plurality of optimized read voltages from which the plurality of sets of signal and noise characteristics are determined respectively. ### Claim 4 (depends on 2) The method of claim 2, wherein the plurality of sets of signal and noise characteristics include first sets of signal and noise characteristics and a second set of signal and noise characteristics measured after the first sets; and the compound feature is generated by: generating a first compound feature from the first sets of signal and noise characteristics; and updating the first compound feature according to the second set of signal and noise characteristics after the second set becomes available. ### Claim 5 (depends on 4) The method of claim 4, wherein the generating of the first compound feature is at least in part concurrent with the measuring of the plurality of sets of signal and noise characteristics of the group of memory cells. ### Claim 6 (depends on 5) The method of claim 5, wherein the generating of the first compound feature is at least in part concurrent with measuring of the second set of signal and noise characteristics of the group of memory cells. ### Claim 7 (depends on 6) The method of claim 6, wherein first optimized read voltages determined from the first sets of signal and noise characteristics are lower than a second optimized read voltage determined from the second set of signal and noise characteristics. ### Claim 8 (depends on 7) The method of claim 7, wherein each respective set in the plurality of sets of signal and noise characteristics is determined by: reading the group of memory cells at a plurality of test voltages; and determining a plurality of bit counts of memory cells that are in a predetermined state at the plurality of test voltages respectively. ### Claim 9 (depends on 8) The method of claim 8, wherein the respective set includes count differences among the bit counts. ### Claim 10 (depends on 9) The method of claim 9, wherein the group of memory cells includes a plurality of subsets; and the reading of the group of memory cells is performed in parallel for the plurality of subsets using different test voltages. ### Claim 11 (depends on 10) The method of claim 10, wherein the plurality of bit counts are determined based on bit counts of the subsets at the different test voltages. ### Claim 12 (depends on 9) The method of claim 9, wherein an optimized read voltage is determined from the respective set by determining a minimum of a distribution of the count differences. ### Claim 13 (depends on 12) The method of claim 12, wherein the controlling of the operation to read the group of memory cells includes deciding to re-calibrate optimized read voltages of the group of memory cells based on the classification. ### Claim 14 (depends on 12) The method of claim 12, wherein the controlling of the operation to read the group of memory cells includes selecting a decoder from a plurality of decoders for data retrieved from the group of memory cells using the optimized read voltages. ### Claim 15 A memory sub-system, comprising: a processing device; and at least one memory device, the memory device having: a group of memory cells formed on an integrated circuit die; and a calibration circuit configured to measure a plurality of sets of signal and noise characteristics of the group of memory cells and determine a plurality of optimized read voltages of the group of memory cells from the plurality of sets of signal and noise characteristics respectively; wherein the memory sub-system is configured to: generate features from the plurality of sets of signal and noise characteristics, the features including at least one compound feature generated from the plurality of sets of signal and noise characteristics; generate, using the features, a classification of a bit error rate of data retrievable from the group of memory cells; and control an operation to read the group of memory cells based on the classification. ### Claim 16 (depends on 15) The memory sub-system of claim 15, wherein generation of the compound feature is performed at least in part in parallel with the calibration circuit measuring a portion of the plurality of sets of signal and noise characteristics of the group of memory cells. ### Claim 17 (depends on 16) The memory sub-system of claim 16, wherein the compound feature is calculated from each of the plurality of sets of signal and noise characteristics. ### Claim 18 A memory device, comprising: a plurality of groups of memory cells formed on an integrated circuit die; and a calibration circuit configured to: measure a plurality of sets of signal and noise characteristics of a group of memory cells; determine a plurality of optimized read voltages of the group of memory cells from the plurality of sets of signal and noise characteristics respectively; generate features from the plurality of sets of signal and noise characteristics, the features including at least one compound feature generated from the plurality of sets of signal and noise characteristics; and generate, using the features, a classification of a bit error rate of data retrievable from the group of memory cells; wherein the memory device is configured to control an operation to read the group of memory cells based on the classification. ### Claim 19 (depends on 18) The memory device of claim 18, further comprising: an integrated circuit package enclosing the memory device; wherein the plurality of sets of signal and noise characteristics includes first sets of signal and noise characteristics and a second set of signal and noise characteristics measured after the first sets; and wherein the compound feature is generated by: generating a first compound feature from the first sets of signal and noise characteristics, at least in part in parallel with measuring the second set; and updating the first compound feature according to the second set of signal and noise characteristics after the second set becomes available. ### Claim 20 (depends on 18) The memory device of claim 18, wherein each respective set in the plurality of sets of signal and noise characteristics determines a corresponding feature; and the compound feature is based on a minimum of the corresponding feature from the plurality of sets of signal and noise characteristics, a maximum of the corresponding feature from the plurality of sets of signal and noise characteristics, or any combination thereof.