# US 11,029,205 B2 · Integrated circuit comprising multiple channels with integrated bypass capacitors and photodiodes > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,029,205 B2 - Document ID: US11029205B2 - Status: Granted - Kind: B2 - Application number: 16/513,457 - Filed: 2019-07-16 - Published: 2019-11-07 - Granted: 2021-06-08 - Earliest claimed: 2019-07-16 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Sungbong Park; Ansheng Liu - Web page: https://patentgrep.com/patent/US11029205B2 ## CPC - G01J 1/46: using a capacitor - H10D 1/68: Capacitors having no potential barriers - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - G01J 2001/4466: {Avalanche} - G01J: MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY (light sources F21, H01J, H01K, H05B; investigating properties of materials by optical means G01N) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Embodiments described herein relate to techniques and configurations associated with a photonic apparatus (e.g., PIC) having a photodiode and a bypass capacitor disposed in a channel. In one instance, the apparatus includes a substrate in which at least first and second channels are formed. The first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode. The first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by the power supply associated with the apparatus. Additional embodiments can be described and claimed. ## Claims ### Claim 1 An apparatus, comprising a photonic integrated circuit (PIC), wherein the PIC includes: a substrate in which at least first and second channels of the PIC are formed adjacent to each other, wherein a channel-to-channel pitch between the first and second channels is equal to a pitch between corresponding adjacent first and second channels on an integrated circuit (IC), wherein the PIC and the IC are to be coupled to form a resulting data channel, wherein the first channel formed on the PIC is to be coupled to the corresponding first channel on the IC, and the second channel formed on the PIC is to be coupled to the corresponding second channel on the IC, wherein the first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode, wherein the first photodiode and the first capacitor have respective first and second sizes that are less than a first size of the first channel of the PIC, in order for the first channel to accommodate the first photodiode and the first capacitor, and wherein the second photodiode and the second capacitor have respective third and fourth sizes that are less than a second size of the second channel of the PIC, in order for the second channel to accommodate the second photodiode and the second capacitor, wherein the first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by a power supply associated with the apparatus. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein each of the first capacitor and the second capacitor comprises a high k dielectric material disposed between two metallic materials. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein one or more of the first capacitor and the second capacitor is a metal-insulator-metal capacitor (MIMCAP). ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the first and second photodiodes comprise an avalanche photodiode (APD) or a PIN photodiode. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein a ground pad coupled to the first capacitor is adjacent a ground pad coupled to a first amplifier that is coupled to the first photodiode and wherein a ground pad coupled to the second capacitor is adjacent a ground pad coupled to a second amplifier that is coupled to the second photodiode. ### Claim 6 (depends on 1) The apparatus of claim 1, further comprising a temperature sensor, to sense a temperature of the apparatus, and provide readings of the temperature to another apparatus for processing. ### Claim 7 A system, comprising: a first electronic device that includes: a first photodiode, a first capacitor coupled to the first photodiode and disposed in a first channel formed in the first electronic device, to assist with biasing the first photodiode, a second photodiode, a second capacitor coupled to the a second photodiode and disposed in a second channel formed in the first electronic device, to assist with biasing the second photodiode, wherein the first and second channels of the PIC are formed adjacent to each other, wherein a channel-to-channel pitch between the first and second channels is equal to a pitch between corresponding adjacent first and second channels on an integrated circuit (IC), wherein the first electronic device and the IC are to be coupled to form a resulting data channel, wherein the first channel formed on the first electronic device is to be coupled to the corresponding first channel on the IC, and the second channel formed on the first electronic device is to be coupled to the corresponding second channel on the IC, wherein the first photodiode and the first capacitor have respective first and second sizes that are less than a first size of the first channel, in order for the first channel to accommodate the first photodiode and the first capacitor, and wherein the second photodiode and the second capacitor have respective third and fourth sizes that are less than a second size of the second channel, in order for the second channel to accommodate the second photodiode and the second capacitor, and wherein the first electronic device further includes a temperature sensor, to sense a temperature of the first electronic device; and a second electronic device that includes a microcontroller, wherein the microcontroller is to adjust a bias voltage of the photodiode, based at least in part on temperature readings provided by the temperature sensor of the first electronic device. ### Claim 8 (depends on 7) The system of claim 7, wherein the microcontroller is to receive readings of the temperature provided by the temperature sensor. ### Claim 9 (depends on 7) The system of claim 7, wherein the second electronic device further includes a biasing circuitry coupled with the microcontroller, to receive a current output from the first photodiode, and provide the current output to the microcontroller for processing, wherein the bias voltage adjustment is further based at least in part on the current output of the first photodiode. ### Claim 10 (depends on 9) The system of claim 9, wherein the biasing circuitry includes a voltage regulator and a current mirror coupled with the voltage regulator, to replicate the current output. ### Claim 11 (depends on 7) The system of claim 7, wherein the first capacitor comprises a metal-insulator-metal capacitor (MIMCAP). ### Claim 12 (depends on 11) The system of claim 11, wherein the first photodiode is an avalanche photodiode (APD) or a PIN photodiode. ### Claim 13 (depends on 12) The system of claim 12, wherein the first electronic device comprises a photonic integrated circuit (PIC). ### Claim 14 (depends on 7) The system of claim 7, wherein the temperature sensor is coupled to the microcontroller, to provide the temperature readings to the microcontroller. ### Claim 15 A computing device, comprising: a processor; and a receiver coupled with the processor, wherein the receiver includes at least first and second channels that are formed adjacent to each other in a photonic integrated circuit (PIC) that includes the receiver, wherein a channel-to-channel pitch between the first and second channels is equal to a pitch between corresponding adjacent first and second channels on an integrated circuit (IC), wherein the PIC and the IC are to be coupled to form a resulting data channel, wherein the first channel formed on the PIC is to be coupled to the corresponding first channel on the IC, and the second channel formed on the PIC is to be coupled to the corresponding second channel on the IC, wherein the first channel includes a first photodiode and a first capacitor coupled to the first photodiode, and the second channel includes a second photodiode and a second capacitor coupled with the second photodiode, wherein the first photodiode and the first capacitor have respective first and second sizes that are less than a first size of the first channel of the PIC, in order for the first channel to accommodate the first photodiode and the first capacitor, and wherein the second photodiode and the second capacitor have respective third and fourth sizes that are less than a second size of the second channel of the PIC, in order for the second channel to accommodate the second photodiode and the second capacitor, wherein the first and second capacitors are provided to assist with biasing the first and second photodiodes respectively and to isolate a signal output by the first and second photodiodes from interference provided by a power supply associated with the receiver. ### Claim 16 (depends on 15) The computing device of claim 15, wherein the first capacitor and the second capacitor comprise a metal-insulator-metal capacitor (MIMCAP). ### Claim 17 (depends on 15) The computing device of claim 15, wherein the first and second photodiodes comprise an avalanche photodiode (APD) or a PIN photodiode.