# US 11,027,554 B2 · Supply authentication via timing challenge response

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- Number: US 11,027,554 B2
- Document ID: US11027554B2
- Status: Granted
- Kind: B2
- Application number: 15/368,369
- Filed: 2016-12-02
- Published: 2017-03-23
- Granted: 2021-06-08
- Earliest claimed: 2016-12-02
- Assignees: Hewlett-Packard Development Company, L.P.
- Applicants: Hewlett-Packard Development Company, L.P.
- Inventors: Jefferson P. Ward; Stephen D. Panshin
- Web page: https://patentgrep.com/patent/US11027554B2

## CPC

- B41J 2/17543: {Cartridge presence detection or type identification}
- B41J 2/17546: {electronically}
- G06F 7/58: Random or pseudo-random number generators
- G06F 21/445: {by mutual authentication, e.g. between devices or programs}
- H04L 9/3242: {involving keyed hash functions, e.g. message authentication codes [MACs], CBC-MAC or HMAC}
- H04L 9/3247: {involving digital signatures}
- H04L 9/3271: {using challenge-response}
- H04L 63/0876: {based on the identity of the terminal or configuration, e.g. MAC address, hardware or software configuration or device fingerprint}
- G06Q 30/018: Certifying business or products
- H04L 2463/121: Timestamp
- H04W 12/61: Time-dependent
- B41J: TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06Q: INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

In an example implementation, a print supply cartridge comprises a microcontroller to receive a timing challenge and enable authentication of the cartridge by providing a challenge response. The challenge response is provided in a challenge response time that falls within an expected time window.

## Claims

### Claim 1

A replaceable supply device comprising:
a print cartridge including printing fluid; and
an electronic device on the print cartridge to facilitate authentication of the replaceable supply device, the electronic device including:
electrical contacts that communicate data with a host device during operation; and
a microcontroller including:
a memory including:
a plurality of calculation counts,
a base key, and
a plurality of reference response time windows secured with a digital signature, the plurality of time windows corresponding to the plurality of calculation counts;
a Central Processing Unit (CPU) in communication with the electrical contacts, the CPU to perform the operations of:
responding to a timing challenge from the host device via the electrical contacts, and
generating different session keys from the base key for respective communication sessions; and
a hardware logic circuit in communication with the CPU, the circuit to perform a calculation including the operations of:
receiving input from the CPU based on the timing challenge received by the CPU from the host device via the electrical contacts, the input including a random seed and one of the session keys, the session key being different for each calculation,
performing an initial iteration of a mathematical calculation based on the input from the CPU,
performing a number of additional iterations of the mathematical calculation based on an output of an immediately prior iteration, the number of iterations based on a selected calculation count of the plurality of calculation counts, and
providing an output from a last of the additional iterations to the CPU, the CPU to prepare a challenge response for transmission to the host device via the electrical contacts within the reference response time window of the plurality of time windows, the reference response time window corresponding to the selected calculation count, for authentication of the replaceable supply device.

### Claim 2 (depends on 1)

The device of claim 1, wherein a time of the challenge response depends on the calculation count.

### Claim 3 (depends on 1)

The device of claim 1, wherein the timing challenge includes challenge parameters to perform the mathematical calculation, including a random seed, the circuit structured to use the random seed to perform the mathematical calculation.

### Claim 4 (depends on 1)

The device of claim 1, wherein the memory includes an identifier (ID).

### Claim 5 (depends on 1)

The device of claim 1, wherein the calculation count specifies the number of additional iterations.

### Claim 6 (depends on 1)

The device of claim 1, wherein the timing challenge includes challenge parameters including a random seed and the circuit is structured to perform the mathematical calculation based on the session key and the random seed to determine the challenge response.

### Claim 7 (depends on 1)

The device of claim 1, wherein the memory has a listing of different reference response time windows for completing the challenge response, respective ones of the reference response time windows corresponding to a different calculation count, the listing secured with the digital signature.

### Claim 8 (depends on 1)

The device of claim 1, wherein, for a given calculation count (x), the circuit is to determine a reference response time window (y) according to slope-intercept formula (y=mx+b).

### Claim 9 (depends on 1)

The device of claim 1, wherein the mathematical calculation is a sequence of operations.