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US 11,018,675 B2Granted
Matrix phase interpolator for phase locked loop
AssigneeKandou Labs, S.A.
InventorArmin Tajalli
Life of this patent
Estimating the term…
Abstract
Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.
Claims20
An apparatus comprising:
- a matrix phase comparator configured to obtain a plurality of phases of a reference clock signal and a plurality of phases of a local oscillator signal, and to generate at least two sets of weighted phase-error signals, each respective set of weighted phase-error signals (i) having an associated fixed phase offset and (ii) wherein each weighted phase-error signal of the respective set of weighted phase-error signals corresponds to a comparison of a respective phase of the reference clock signal to a corresponding phase of the local oscillator signal having the fixed phase offset relative to the respective phase of the reference clock signal;
- and
- a summation circuit configured to receive the weighted phase-error signals of each of the at least two sets of weighted phase-error signals and to responsively generate a composite interpolated phase-error signal by forming a summation of the weighted phase-error signals, the composite interpolated phase-error signal provided to a local oscillator generating the plurality of phases of the local oscillator signal.
A method comprising:
- obtaining, at a matrix phase comparator, a plurality of phases of a reference clock signal and a plurality of phases of a local oscillator signal;
- generating, using the matrix phase comparator, at least two sets of weighted phase-error signals, each respective set of weighted phase-error signals (i) having an associated fixed phase offset and (ii) wherein each weighted phase-error signal of the respective set of weighted phase-error signals corresponds to a comparison of a respective phase of the reference clock signal to a corresponding phase of the local oscillator signal having the fixed phase offset relative to the respective phase of the reference clock signal;
- generating, using a summation circuit, a composite interpolated phase-error signal by forming a summation of the weighted phase-error signals;
- and
- providing the composite interpolated phase-error signal to a local oscillator generating the plurality of phases of the local oscillator signal.
2 more elements
Dependencies are inferred from the claim text.