Loading patent…
AssigneeKabushiki Kaisha Toshiba
InventorsAkihiro Goryu, Akira Kano, Kenji Hirohata
Estimating the term…
A semiconductor storage device comprises a plurality of memory cells arranged in a matrix. Each of the memory cells includes: a semiconductor storage element including a silicon carbide substrate and a silicon carbide film on a first surface of the silicon carbide substrate; a lower electrode on a second surface facing away from the first surface of the silicon carbide substrate; and an upper electrode on at least part of a surface of the silicon carbide film, the surface facing away from another surface of the silicon carbide film in contact with the silicon carbide substrate. Each memory cell includes at least one basal plane dislocation formed at at least part of the semiconductor storage element.
A semiconductor storage device comprising a plurality of memory cells arranged in a matrix, wherein
A method of controlling a semiconductor storage device including a plurality of memory cells each including a semiconductor storage element including a silicon carbide substrate and a silicon carbide film on a first surface of the silicon carbide substrate, a lower electrode on a second surface facing away from the first surface of the silicon carbide substrate, and an upper electrode on at least part of at least one third surface of the silicon carbide film, the third surface facing away from the first surface of the silicon carbide film in contact with the silicon carbide substrate, each memory cell including at least one basal plane dislocation formed at at least part of the semiconductor storage element, the method comprising:
A method of controlling a semiconductor storage device including a plurality of memory cells each including a semiconductor storage element including a silicon carbide substrate and a silicon carbide film on a first surface of the silicon carbide substrate, a lower electrode on a second surface facing away from the first surface of the silicon carbide substrate, and an upper electrode on at least part of at least one third surface of the silicon carbide film, the third surface facing away from the first surface of the silicon carbide film in contact with the silicon carbide substrate, each memory cell including at least one basal plane dislocation formed at at least part of the semiconductor storage element,
A computer program product having a computer readable medium including programmed instructions, wherein the instructions, when executed by a computer, cause the computer to control a semiconductor storage device including a plurality of memory cells each including a semiconductor storage element including a silicon carbide substrate and a silicon carbide film on a first surface of the silicon carbide substrate, a lower electrode on a second surface facing away from the first surface of the silicon carbide substrate, and an upper electrode on at least part of at least one third surface of the silicon carbide film, the third surface facing away from the first surface of the silicon carbide film in contact with the silicon carbide substrate, each memory cell including at least one basal plane dislocation formed at at least part of the semiconductor storage element,
Dependencies are inferred from the claim text.