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US 11,012,045 B2Granted
Variable gain amplifier
AssigneeApple Inc.
InventorsSang Hyun Woo, Paul-Aymeric H. Fontaine
Life of this patent
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Abstract
A variable gain amplifier circuit is disclosed. In one embodiment, an amplifier circuit includes first and second stages. Each stage includes one or more inverter pairs, with one inverter of each pair coupled to receive an inverting component of a differential signal and the other inverter of the pair coupled to receive a non-inverting component. The first stage receives a differential input signal and produces an intermediate differential signal. The second stage receives the intermediate differential signal and produces a differential output signal, the differential output signal being an amplified version of the differential input signal.
Claims20
A circuit comprising:
- a first stage configured to receive a differential input signal, the first stage having one or more inverter pairs including a first inverter configured to receive an inverting component of the differential input signal on an inverting input node and a second inverter configured to receive a non-inverting component of the differential input signal on a non-inverting input node, wherein the first stage is configured to output an intermediate differential signal;
- a second stage coupled to receive the intermediate differential signal, where second stage having one or more inverter pairs including a third inverter coupled to receive a first component of the intermediate differential signal on a first intermediate node and a fourth inverter coupled to receive a second component of the intermediate differential signal on a second intermediate node, wherein the second stage is configured to provide a differential output signal, wherein an inverting component of the differential output signal is conveyed on an inverting output node and wherein a non-inverting component of the output signal is conveyed on a non-inverting output node;
- a low dropout (LDO) voltage regulator coupled to provide a supply voltage to each of the one or more inverter pairs of the first stage and each of the one or more inverter pairs of the second stage.
A method comprising:
- receiving a differential input signal at a first stage of an amplifier circuit, wherein receiving the differential input signal includes a first inverter receiving an inverting component of the differential input signal on an inverting input node and a second inverter receiving a non-inverting component of the differential input signal on a non-inverting input node;
- outputting, from the first stage of the amplifier circuit, an intermediate differential signal;
- receiving the intermediate differential signal at a second amplifier stage, wherein receiving the intermediate differential signal includes a third inverter receiving a first component of the intermediate differential signal on a first intermediate node and a fourth inverter receiving a second component of the intermediate differential signal on a second intermediate node;
- and
- outputting, from the second stage, a differential output signal, wherein outputting the differential output signal includes conveying an inverting component of the differential output signal on an inverting output node conveying a non-inverting component of the output signal on a non-inverting output node;
- wherein the first stage includes a first plurality of inverter pairs including the first and second inverters and the second stage includes a second plurality of inverter pairs including the third and fourth inverters, and wherein the method further comprises a low-dropout (LDO) voltage regulator providing a supply voltage to each of the first and second pluralities of inverter pairs.
3 more elements
A system comprising:
- a receive amplifier configured to amplifier a radio frequency signal received, at a first frequency, via an antenna;
- a downconversion circuit coupled to receive the radio frequency signal and generate a first differential signal at a second frequency less than the first frequency;
- and
- a variable gain amplifier (VGA) coupled to the downconversion circuit, the VGA including:
- a first stage coupled to receive the first differential signal, the first stage including a first inverter pair having a first inverter coupled to receive an inverting component of the first differential signal and a second inverter coupled to receive a non-inverting component of the first differential signal, wherein the first stage is configured output a second differential signal;
- a second stage coupled to receive the second differential signal, the second stage having a second inverter pair including a third inverter coupled to receive an first component of the second differential signal and a fourth inverter coupled to receive a second component of the second differential signal, wherein the second stage is configured to output a non-inverting component of a third differential signal on a non-inverting output node and an inverting component of the third differential signal on an inverting output node.
3 more elements
Dependencies are inferred from the claim text.