Artificial transmission line using t-coil sections

An electronic circuit defining an integrated phase shifter circuit, the electronic circuit comprising:

• a first electrical path to provide a first specified phase shift, the first electrical path comprising an artificial transmission line structure comprising at least two unit cells, wherein a respective unit cell amongst the at least two unit cells comprises:
• a first t-coil section defined by a first inductor mutually magnetically coupled and conductively coupled in series with a second inductor, and a first shunt capacitor coupled to a node between the first inductor and the second inductor;
• and
• a third inductor conductively coupled in series with the second inductor, the third inductor located between the second inductor and an output node of the respective unit cell;
• wherein the third inductor is arranged to suppress or inhibit mutual magnetic coupling of the third inductor with the first inductor and to suppress or inhibit mutual magnetic coupling of the third inductor with the second inductor;
• and
• a second electrical path to provide a second specified phase shift different than the first specified phase shift;
• at least a first switch to selectively couple an input signal through the first electrical path or the second electrical path in response to a control signal.

A method for controlling a delay value for an electrical signal using a phase shifter circuit, the method comprising:

• receiving a control signal and, in response, selectively coupling the electrical signal through one of a first electrical path to provide a first specified phase shift or a second electrical path to provide a second specified phase shift different than the first specified phase shift;
• wherein the first electrical path comprises an artificial transmission line structure comprising at least two unit cells, wherein a respective unit cell amongst the at least two unit cells comprises:
• a first t-coil section defined by a first inductor mutually magnetically coupled and conductively coupled in series with a second inductor, and a first shunt capacitor coupled to a node between the first inductor and the second inductor;
• and
• a third inductor conductively coupled in series with the second inductor, the third inductor located between the second inductor and an output node of the respective unit cell;
• wherein the third inductor is arranged to suppress or inhibit mutual magnetic coupling of the third inductor with the first inductor and to suppress or inhibit mutual magnetic coupling of the third inductor with the second inductor.