US 10,998,917 B1Granted

Sigma-delta analog-to-digital converter

AssigneeNXP B.V.

InventorKamlesh Singh

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Abstract

A sigma-delta analog-to-digital converter (ADC) includes a feed-forward circuit, a finite-impulse-response (FIR) digital-to-analog converter (DAC), and a decimation filter. The feed-forward circuit is configured to receive an analog input signal and a feedback signal and generate a set of digital signals. Each feedback element of the FIR DAC includes a flip-flop and a reset circuit. The reset circuit is configured to receive a corresponding reset signal of a set of reset signals and output a reference output signal when the corresponding reset signal is deactivated. The reset signal of each feedback element is deactivated sequentially after each cycle of a clock signal that is received by the flip-flop associated with a corresponding reset circuit of each feedback element. The feedback signal is generated based on the reference output signal. The decimation filter is configured to generate a digital output signal based on the set of digital signals.

Claims20

Dependent claims

A sigma-delta analog-to-digital converter (ADC), comprising:

a feed-forward circuit that is configured to receive a set of analog signals and a refresh signal, and generate a set of digital signals, wherein the set of analog signals includes an analog input signal and a feedback signal;
a first finite-impulse-response (FIR) digital-to-analog converter (DAC) that is coupled with the feed-forward circuit, and configured to receive the set of digital signals and a clock signal, and generate the feedback signal, wherein the first FIR DAC comprises a set of feedback elements, and wherein each feedback element comprises:
a flip-flop that is configured to receive a first input signal and generate a set of flop-output signals, wherein the first input signal is based on the set of digital signals;
and
a reset circuit that is coupled with the flip-flop, and configured to receive a set of reference signals, the set of flop-output signals, and a corresponding reset signal of a set of reset signals, and output a reference output signal based on the corresponding reset signal, wherein the reset circuit of each feedback element outputs the reference output signal sequentially after each cycle of the clock signal, and wherein the feedback signal is generated based on the reference output signal;
and
a decimation filter that is coupled with the feed-forward circuit, and configured to receive the set of digital signals and the refresh signal, and generate a digital output signal.

4 more elements

A method of generating a digital output signal by a sigma-delta analog-to-digital converter (ADC), the method comprising:

receiving, by a feed-forward circuit of the sigma-delta ADC, a set of analog signals and a refresh signal, wherein the set of analog signals includes an analog input signal and a feedback signal;
generating, by the feed-forward circuit, a set of digital signals;
receiving, by a set of feedback elements of a finite-impulse-response (FIR) digital-to-analog converter (DAC) of the sigma-delta ADC, a first input signal, a clock signal, a set of reference signals, and a set of reset signals, wherein the first input signal is based on the set of digital signals;
outputting, by each feedback element, a reference output signal sequentially after each cycle of the clock signal based on a corresponding reset signal of the set of reset signals, wherein the reference output signal is at least one of first and second reference signals of the set of reference signals, and wherein the feedback signal is generated based on the reference output signal;
receiving, by a decimation filter of the sigma-delta ADC, the set of digital signals and the refresh signal;
and
generating, by the decimation filter, the digital output signal based on the set of digital signals.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/929,084Filed 14 Jul 2020
Granted: 4 May 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H03M 3/39
Delta-sigma modulation: structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
H03M 3/492
Using automatic control: in feed forward mode, i.e. by determining the range to be selected directly from the input signal
H03M 3/356
At one point, i.e. by adjusting a single reference value, e.g. bias or gain error: offset or drift compensation
H03M 3/37
Of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators: compensation or reduction of delay or phase…