# US 10,986,730 B2 · Techniques for routing electrical signals through electrical components and related methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,986,730 B2 - Document ID: US10986730B2 - Status: Granted - Kind: B2 - Application number: 16/418,792 - Filed: 2019-05-21 - Published: 2020-09-10 - Granted: 2021-04-20 - Earliest claimed: 2019-03-08 - Assignees: Microsemi Semiconductor ULC - Applicants: Microsemi Semiconductor ULC - Inventors: Nasser Ghassemi; Mehran Aliahmad - Web page: https://patentgrep.com/patent/US10986730B2 ## CPC - H05K 1/024: {Dielectric details, e.g. changing the dielectric material around a transmission line} - H05K 1/116: {Lands, clearance holes or other lay-out details concerning the surrounding of a via} - H05K 3/4038: {Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence)} - H05K 3/4697: {having cavities, e.g. for mounting components (H05K3/4691 takes precedence)} - H05K 3/0047: {Drilling of holes} - H05K 2201/0187: with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties - H05K 2201/0394: Conductor crossing over a hole in the substrate or a gap between two separate substrate parts - H05K 2201/09063: Holes or slots in insulating substrate not used for electrical connections - H05K 2201/093: Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract Substrates configured to route electrical signals may include a first dielectric material and an electrically conductive material located on a first side of the first dielectric material. A second dielectric material may be located on a second, opposite side of the first dielectric material. A series of voids may be defined by the second dielectric material extending from the first dielectric material at least partially through the second dielectric material. Footprints of at least some of the voids of the series of voids may at least partially laterally overlap with the electrically conductive material. ## Claims ### Claim 1 A substrate configured to route electrical signals, comprising: a first dielectric material; an electrically conductive material located on a first side of the first dielectric material; a second dielectric material located on a second, opposite side of the first dielectric material; another quantity of the second dielectric material located on the first side of the first dielectric material partially over the electrically conductive material; a series of voids defined by the second dielectric material extending from the first dielectric material at least partially through the second dielectric material, footprints of at least some of the voids of the series of voids at least partially laterally overlapping with the electrically conductive material; and another series of voids defined by the other quantity of the second dielectric material and extending from the first dielectric material and the electrically conductive material at least partially through the other quantity of the second dielectric material, other footprints of at least some of the voids of the other series of voids at least partially laterally overlapping with the electrically conductive material; wherein each of the series of voids and the other series of voids remains free of occupying material within the series of voids and the other series of voids. ### Claim 2 (depends on 1) The substrate of claim 1, wherein the footprints of the at least some of the voids of the series of voids at least partially laterally overlaps with a width of the electrically conductive material. ### Claim 3 (depends on 1) The substrate of claim 1, wherein at least one of the voids of the series of voids extends entirely through the second dielectric material. ### Claim 4 (depends on 1) The substrate of claim 1, wherein a greatest lateral dimension of the voids of the series of voids is greater than a greatest width of the electrically conductive material. ### Claim 5 (depends on 1) The substrate of claim 1, wherein a greatest lateral dimension of the voids of the series of voids is less than a greatest width of the electrically conductive material. ### Claim 6 (depends on 1) The substrate of claim 1, wherein a shortest distance between adjacent voids of the series of voids is about one-third a greatest lateral dimension of the adjacent voids or less. ### Claim 7 (depends on 1) The substrate of claim 1, wherein a cross-sectional shape of at least one void of the series of voids is selected from the group consisting of: a circle, an oval, an ellipse, a rectangle, or a polygon. ### Claim 8 (depends on 1) The substrate of claim 1, further comprising another quantity of the electrically conductive material located laterally adjacent to the electrically conductive material on the first side of the first dielectric material. ### Claim 9 (depends on 8) The substrate of claim 8, wherein the footprints of at least some of the voids of the series of voids at least partially laterally overlap with the other quantity of the electrically conductive material. ### Claim 10 (depends on 9) The substrate of claim 9, wherein the footprint of at least one of the voids of the series of voids at least partially laterally overlaps with the electrically conductive material and the other quantity of the electrically conductive material. ### Claim 11 (depends on 10) The substrate of claim 10, wherein the footprint of the at least one of the voids of the series of voids extends laterally beyond each of the electrically conductive material and the other quantity of the electrically conductive material. ### Claim 12 (depends on 1) The substrate of claim 1, wherein the voids of the series of voids are aligned with corresponding voids of the other series of voids. ### Claim 13 (depends on 1) The substrate of claim 1, further comprising a ground plane located on a side of the other quantity of the second dielectric material opposite the first dielectric material and the electrically conductive material. ### Claim 14 (depends on 1) The substrate of claim 1, wherein the electrically conductive material is configured as a strip line. ### Claim 15 (depends on 1) The substrate of claim 1, wherein a first thickness of the second dielectric material is different from a second thickness of the other quantity of the second dielectric material. ### Claim 16 (depends on 1) The substrate of claim 1, further comprising a ground plane located on a side of the second dielectric material opposite the first dielectric material. ### Claim 17 (depends on 1) The substrate of claim 1, wherein the electrically conductive material is configured as a microstrip line. ### Claim 18 A printed circuit board, comprising: a dielectric core; a trace including electrically conductive material supported on a first major surface of the dielectric core; a dielectric material located on a second, opposite major surface of the dielectric core; another quantity of the dielectric material located on the first major surface of the dielectric core partially over the trace; a pattern of holes extending from the dielectric core at least partially through the dielectric material, footprints of at least some of the holes of the pattern of holes at least partially laterally overlapping with a width of the trace, the pattern of holes extending along at least a majority of a length of the trace; and another pattern of holes defined by the other quantity of the dielectric material and extending from the dielectric material and the electrically conductive material at least partially through the other quantity of the dielectric material, other footprints of at least some of the holes of the other patterns of holes at least partially laterally overlapping with the trace; wherein each of the pattern of holes and the other pattern of holes remains free of occupying material within the pattern of holes and the other pattern of holes. ### Claim 19 (depends on 18) The printed circuit board of claim 18, wherein the dielectric material comprises a fiber-matrix composite material. ### Claim 20 A method of making a substrate, comprising: removing portions of electrically conductive material located on a first major surface of a dielectric core, leaving a trace of the electrically conductive material on the first major surface; forming a series of voids extending at least partially through a dielectric material by removing portions of the dielectric material to leave the voids; placing the dielectric material adjacent to a second major surface of the dielectric core located on a side of the dielectric core opposite the trace, footprints of at least some of the voids of the series of voids at least partially laterally overlapping with the trace; forming another series of voids extending at least partially through another quantity of the dielectric material by removing portions of the other quantity of the dielectric material to leave the other series of voids; placing the other quantity of the dielectric material adjacent to the first major surface of the dielectric core located on a same side of the dielectric core as the trace, footprints of at least some of the voids of the other series of voids at least partially laterally overlapping with the trace; securing the dielectric material and the other quantity of the dielectric material to the dielectric core; and leaving each of the series of voids and the other series of voids free of occupying material within the series of voids and the other series of voids. ### Claim 21 (depends on 20) The method of claim 20, wherein forming the series of voids comprises drilling the series of voids entirely through the dielectric material. ### Claim 22 (depends on 20) The method of claim 20, wherein placing the dielectric material adjacent to the second major surface of the dielectric core comprises placing a stratum comprising the dielectric material adjacent to the second major surface of the dielectric core. ### Claim 23 (depends on 22) The method of claim 22, wherein placing the other quantity of the dielectric material adjacent to the first major surface of the dielectric core comprises placing another stratum comprising the other quantity of the dielectric material on a side of the dielectric core opposite the stratum. ### Claim 24 An intermediate product in a method of making a substrate configured to route electrical signals, comprising: a first stratum, the first stratum comprising: a first dielectric material; an electrically conductive material located on a first side of the first dielectric material; a second dielectric material located on a second, opposite side of the first dielectric material; and a series of voids defined by the second dielectric material extending from the first dielectric material at least partially through the second dielectric material, footprints of at least some of the voids of the series of voids at least partially laterally overlapping with the electrically conductive material; and a second stratum adjacent to the first stratum, the second stratum comprising: another quantity of the second dielectric material located on the first side of the first dielectric material partially over the electrically conductive material; and another series of voids defined by the other quantity of the second dielectric material and extending from the first dielectric material and the electrically conductive material at least partially through the other quantity of the second dielectric material, other footprints of at least some of the voids of the other series of voids at least partially laterally overlapping with the electrically conductive material; wherein each of the series of voids and the other series of voids remains free of occupying material within the series of voids and the other series of voids.