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AssigneepSemi Corporation
InventorsRobert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta, Simon Edward Willard
Estimating the term…
Modified silicon-on-insulator (SOI) substrates having a trap rich layer, and methods for making such modifications. The modified regions eliminate or manage accumulated charge that would otherwise arise because of the interaction of the underlying trap rich layer and active layer devices undergoing transient changes of state, thereby eliminating or mitigating the effects of such accumulated charge on non-RF integrated circuitry fabricated on such substrates. Embodiments retain the beneficial characteristics of SOI substrates with a trap rich layer for RF circuitry requiring high linearity, such as RF switches, while avoiding the problems of a trap rich layer for circuitry that is sensitive to accumulated charge effects caused by the presence of the trap rich layer, such as non-RF analog circuitry and amplifiers (including power amplifiers and low noise amplifiers).
An integrated circuit structure including:
An integrated circuit structure including:
An integrated circuit structure formed from a silicon-on-insulator (SOI) substrate having a trap rich layer formed on the substrate, an insulator layer formed on the trap rich layer, and an active layer formed on the insulator layer, wherein a void is formed through the active layer, the underlying insulator layer, and the underlying trap rich layer to the substrate to define at least one non-trap rich region, wherein first transistor circuitry is fabricated above one of the non-trap rich regions, and wherein second transistor circuitry is fabricated above the trap rich layer.
An integrated circuit structure formed from a silicon-on-insulator (SOI) substrate having a trap rich layer formed on the substrate, an insulator layer formed on the trap rich layer, an active layer formed on the insulator layer, and at least one raised semiconductor region formed on the active layer, wherein first circuitry is fabricated on or in at least one of the raised semiconductor regions, and second circuitry is fabricated in and/or on the active layer above the trap rich layer.
Dependencies are inferred from the claim text.