Reusing switch ports for external buffer network

An Integrated Circuit (IC), comprising:

• multiple ports, configured to serve as ingress ports and egress ports for receiving and transmitting packets from and to a communication network;
• and
• packet processing circuitry, configured to:
• forward the packets between the ingress ports and the egress ports;
• read an indication that specifies whether the IC is to operate in an internal buffer configuration or in an off-chip buffer configuration;
• when the indication specifies the internal buffer configuration, buffer the packets internally to the IC;
• and
• when the indication specifies the off-chip buffer configuration, configure one or more of the ports for connecting to a memory system external to the IC, and for buffering at least some of the packets in the memory system, externally to the IC,
• wherein the packet processing circuitry is configured to configure a same port for communication over the communication network when operating in the internal buffer configuration, and for communicating with the memory system when operating in the off-chip buffer configuration;
• and the IC further comprises a dual-purpose buffer, and wherein the processing circuitry is configured to store the packets in the dual-purpose buffer when the indication specifies the on-chip buffer configuration, and to store in the dual-purpose buffer both the packets and packet descriptor queues when the indication specifies the off-chip buffer configuration.