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US 10,951,389 B2Granted
Phase detector, phase synchronization circuit, and method of controlling phase synchronization circuit
AssigneeSony Semiconductor Solutions Corporation
InventorsZhiwei Zhou, Takashi Masuda, Kenichi Maruko
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Abstract
The operation range of a phase detector provided with a flip-flop is improved, and the jitter tolerance of a receiving circuit is enhanced. The phase detector includes a holding unit and a detection unit. In the phase detector, the holding unit holds an input signal in synchronization with a predetermined periodic signal. The detection unit detects a phase difference between a designated edge and the predetermined periodic signal on the basis of a signal held in the holding unit. The designated edge is designated by a control signal that designates one of a rising edge and a falling edge of the input signal as the designated edge.
Claims17
A phase detector, comprising:
- a holding unit that includes:
- a first former-stage flip-flop;
- and
- a first latter-stage flip-flop;
- and
- a detection unit that includes:
- a selection unit configured to:
- select one of an input signal or an inverted signal based on a control signal, wherein
- the inverted signal is inversion of the input signal, and
- the control signal designates one of a rising edge of the input signal or a falling edge of the input signal as a designated edge;
- and
- supply the selected one of the input signal or the inverted signal as a first internal signal to the first former-stage flip-flop, wherein
- the first former-stage flip-flop is configured to hold and supply the first internal signal to the first latter-stage flip-flop,
- the first internal signal is held in synchronization with a rising edge of a periodic signal,
- the first latter-stage flip-flop is configured to hold and supply the first internal signal supplied from the first former-stage flip-flop, and
- the first internal signal supplied from the first latter-stage flip-flop is held in synchronization with a falling edge of the periodic signal;
- and
- a logic circuit configured to detect a phase difference between one of a rising edge of the first internal signal or a falling edge of the first internal signal and the periodic signal based on the first internal signal held in synchronization with the periodic signal in the holding unit.
15 more elements
A phase synchronization circuit, comprising:
- a holding unit that includes:
- a first former-stage flip-flop;
- and
- a first latter-stage flip-flop;
- an oscillator;
- and
- a detection unit that includes:
- a selection unit configured to:
- select one of an input signal or an inverted signal based on a control signal, wherein
- the inverted signal is inversion of the input signal, and
- the control signal designates one of a rising edge of the input signal or a falling edge of the input signal as a designated edge;
- and
- supply the selected one of the input signal or the inverted signal as an internal signal to the first former-stage flip-flop, wherein
- the first former-stage flip-flop is configured to hold and supply the internal signal to the first latter-stage flip-flop,
- the internal signal is held in synchronization with a rising edge of a periodic signal,
- the first latter-stage flip-flop is configured to hold and supply the internal signal from the first former-stage flip-flop, and
- the internal signal supplied from the first latter-stage flip-flop is held in synchronization with a falling edge of the periodic signal;
- and
- a that logic circuit configured to detect a phase difference between one of a rising edge of the internal signal or a falling edge of the internal signal and the periodic signal based on the internal signal held in synchronization with the periodic signal in the holding unit, wherein
- the oscillator is configured to:
- generate the periodic signal, wherein the generated periodic signal has a frequency corresponding to the phase difference, and
- supply the periodic signal to the holding unit.
19 more elements
A method of controlling a phase synchronization circuit, the method comprising:
- selecting, by a selection unit, one of an input signal or an inverted signal based on a control signal, wherein
- the inverted signal is inversion of the input signal, and
- the control signal designates one of a rising edge of the input signal or a falling edge of the input signal as a designated edge;
- supplying, by the selection unit, the selected one of the input signal or the inverted signal as an internal signal to a first former-stage flip-flop,
- holding and supplying, by the first former-stage flip-flop, the internal signal to a first latter-stage flip-flop, wherein the internal signal is held in synchronization with a rising edge of a periodic signal,
- holding and supplying, by the first latter-stage flip-flop, the internal signal from the first former-stage flip-flop, wherein the internal signal supplied from the first latter-stage flip-flop is held in synchronization with a falling edge of the periodic signal,
- detecting, by a logic circuit a phase difference between one of a rising edge of the internal signal or a falling edge of the internal signal and the periodic signal based on the internal signal held in synchronization with the periodic signal in a holding unit,
- generating, by an oscillator, the periodic signal, wherein the generated periodic signal has a frequency corresponding to the phase difference, and
- supplying, by the oscillator, the periodic signal to the holding unit.
6 more elements
Dependencies are inferred from the claim text.