Multiplying digital to analog converter with increased multiplying bandwidth

A multiplying digital to analog converter (MDAC) comprising:

• a plurality of resistors including:
• a first resistor configured to be selectively connected to a current output determined by a first bit of a first portion of an input digital code;
• and
• a second resistor configured to be selectively connected to the current output determined by a second bit of the first portion of the input digital code, wherein a resistance of the second resistor is twice a resistance of the first resistor;
• and
• a plurality of capacitors including:
• a first capacitor configured to be selectively connected to the current output determined by the first bit of the first portion;
• and
• a second capacitor configured to be selectively connected to the current output determined by the second bit of the first portion, wherein a capacitance of the second capacitor is one half a capacitance of the first capacitor.

A multiplying digital to analog converter (MDAC) comprising:

• a first resistor having a first resistance;
• a first pair of switches configured to selectively connect or disconnect the first resistor to a current output or ground determined by a digit of a thermometric encoding of a portion of an input digital code;
• a second resistor having a second resistance that is scaled with respect to the first resistance by a factor N where N is an integer;
• a second pair of switches configured to selectively connect or disconnect the second resistor to the current output or ground determined by a bit of a second portion of the input digital code;
• a first capacitor having a first capacitance;
• a third pair of switches configured to selectively connect or disconnect the first capacitor to the current output or ground determined by the digit of the thermometric encoding;
• a second capacitor having a second capacitance that is scaled with respect to the first capacitance by 1/N;
• and
• a fourth pair of switches configured to selectively connect or disconnect the second capacitor to the current output or ground determined by the bit of the second portion of the input digital code.