Configurable switched power amplifier for efficient high/low output power

A power amplifier, comprising:

• a differential input including a positive (P) input and a negative (N) input;
• a first cascode amplifier coupled to receive the P input comprising:
• an output stage having a positive (P) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• wherein the first input stage and the second input stage are enabled in a high-power mode of operation;
• and
• wherein the first input stage is disabled and the second input stage is enabled during a low-power mode of operation;
• a second cascode amplifier coupled to receive the N input comprising:
• an output stage having a negative (N) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• wherein the first input stage and the second input stage are enabled in a high-power mode of operation;
• and
• wherein the first input stage is disabled and the second input stage is enabled during a low-power mode of operation;
• and
• a switchable clamp coupled to an output for the first and second input stages for the first and second cascode amplifiers, the switchable clamp being enabled during the low-power mode of operation to hold the output to a voltage.

A method to amplify output signals, comprising:

• receiving a differential input including a positive (P) input and a negative (N) input;
• providing the P input to a first cascode amplifier comprising:
• an output stage having a positive (P) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• providing the N input to a second cascode amplifier comprising:
• an output stage having a negative (N) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• for a high-power mode of operation, enabling the first input stages and the second input stages for the first and second cascode amplifiers;
• for a low-power mode of operation, disabling the first input stages for the first and second cascode amplifiers and enabling the second input stages for the first and second cascode amplifiers,
• wherein the output stages for the first and second cascode amplifiers comprise an NMOS transistor;
• and
• biasing the gates for the NMOS transistor with a first voltage in the high-power mode of operation and a second voltage during the low-power mode of operation, the second voltage being higher than the first voltage.

A method to amplify output signals, comprising:

• receiving a differential input including a positive (P) input and a negative (N) input;
• providing the P input to a first cascode amplifier comprising:
• an output stage having a positive (P) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• providing the N input to a second cascode amplifier comprising:
• an output stage having a negative (N) output;
• a first input stage coupled to the output stage;
• and
• a second input stage coupled to the output stage;
• for a high-power mode of operation, enabling the first input stages and the second input stages for the first and second cascode amplifiers;
• for a low-power mode of operation, disabling the first input stages for the first and second cascode amplifiers and enabling the second input stages for the first and second cascode amplifiers;
• and
• enabling a switchable clamp during the low-power mode of operation, the switchable clamp being coupled to an output for the first and second input stages for the first and second cascode amplifiers, and holding the output to a voltage during the low-power mode of operation.