Two-terminal electronic charge resistance switching device
AssigneeNational Technology & Engineering Solutions of Sandia, LLC
InventorsMatthew Marinella, Sapan Agarwal
Life of this patent
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Abstract
A two-terminal memory device and methods for its use are provided. In the device, a bottom electrode is electrically continuous with a first operating terminal, and a control gate electrode is electrically continuous with a second operating terminal. A stack of insulator layers comprising a hopping conduction layer and a tunnel layer is contactingly interposed between the bottom electrode and the control gate electrode. The tunnel layer is thinner than the hopping conduction layer, and it has a wider bandgap than the hopping conduction layer. The hopping conduction layer consists of a material that supports electron hopping transport.
Claims8
A two-terminal memory device comprising a bottom electrode electrically continuous with a first operating terminal of the device and a control gate electrode electrically continuous with a second operating terminal of the device, and further comprising a stack of insulator layers contactingly interposed between the bottom electrode and the control gate electrode, wherein:
- the stack of insulator layers comprises a hopping conduction layer and a tunnel layer;
- the tunnel layer is thinner than the hopping conduction layer and has a wider bandgap than the hopping conduction layer;
- and
- the hopping conduction layer consists of a material that supports electron hopping transport.
A method of information storage, comprising applying a charging bias voltage across a bilayer of different insulating material layers having an interface between them, wherein:
- the bilayer consists of a tunnel layer and a hopping conduction layer;
- the charging bias voltage is effective to tunnel electrons across the tunnel layer and across the interface, but is not effective to drive the tunneled electrons across the hopping conduction layer;
- the method further comprises removing the charging bias voltage while the tunneled electrons are trapped at the interface;
- the bilayer is included in a two-terminal memory device having only a first operating terminal and a second operating terminal;
- the first operating terminal is electrically continuous with a bottom electrode, and the second operating terminal is electrically continuous with a control gate electrode;
- the bilayer is contactingly interposed between the bottom electrode and the control gate electrode;
- and
- the charging bias voltage is applied between the first operating terminal and the second operating terminal.
A method of information retrieval, comprising applying a reading bias voltage across a bilayer of different insulating material layers having an interface between them, wherein:
- the bilayer consists of a tunnel layer and a hopping conduction layer;
- the reading bias voltage is effective to drive trapped electrons away from the interface and across the hopping conduction layer by electron hopping transport, but is ineffective to drive electrons across the tunnel layer;
- the reading bias voltage is less than a threshold voltage for electron tunneling in the tunnel layer;
- the bilayer is included in a two-terminal memory device having only a first operating terminal and a second operating terminal;
- the first operating terminal is electrically continuous with a bottom electrode, and the second operating terminal is electrically continuous with a control gate electrode;
- the bilayer is contactingly interposed between the bottom electrode and the control gate electrode;
- and
- the reading bias voltage is applied between the first operating terminal and the second operating terminal.
Dependencies are inferred from the claim text.