Resisitive random access memory structure and method for forming the same
AssigneeWinbond Electronics Corp.
InventorsBo-Lun Wu, Yi-Hsiu Chen, Ting-Ying Shen, Po-Yen Hsu
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Abstract
A resistive random access memory structure includes a semiconductor substrate, a transistor, a bottom electrode, a plurality of top electrodes, and a resistive-switching layer. The transistor is disposed over the semiconductor substrate. The bottom electrode is disposed over the semiconductor substrate and is electrically connected to a drain region of the transistor. The plurality of top electrodes is disposed along a sidewall of the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the plurality of top electrodes.
Claims20
A resistive random access memory (RRAM) structure, comprising:
- a semiconductor substrate;
- a transistor disposed over the semiconductor substrate;
- a bottom electrode disposed over the semiconductor substrate, wherein the bottom electrode is electrically connected to a drain region of the transistor;
- a plurality of top electrodes disposed along a sidewall of the bottom electrode, wherein the plurality of top electrodes extend radially from the bottom electrode on a same plane;
- and
- a resistance-switching layer disposed between the plurality of top electrodes and the bottom electrode.
A resistive random access memory (RRAM) structure, comprising:
- a semiconductor substrate;
- multiple metal layers disposed over the semiconductor substrate;
- and
- a memory cell disposed over the semiconductor substrate, comprising:
- a bottom electrode;
- a plurality of top electrodes disposed along a sidewall of the bottom electrode;
- and
- a resistance-switching layer disposed between the plurality of top electrodes and the bottom electrode,
- wherein the top electrodes are electrically connected to at least two layers of the multiple metal layers.
A method for forming a resistive random access memory (RRAM) structure, comprising:
- providing a semiconductor substrate;
- forming an IMD layer over the semiconductor substrate;
- forming a bottom electrode over the IMD layer;
- forming a resistance-switching layer surrounding the bottom electrode;
- and
- forming a plurality of top electrodes along a sidewall of the bottom electrode, wherein the plurality of top electrodes extend radially from the bottom electrode on a same plane, wherein the resistance-switching layer is between the bottom electrode and the plurality of top electrodes.
Dependencies are inferred from the claim text.