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US 10,950,664 B2Granted
Semiconductor memory device including phase change material layers and method for manufacturing thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJau-Yi Wu
Life of this patent
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Abstract
A semiconductor memory device disposed over a substrate includes a common electrode, a selector material layer surrounding the common electrode, and a plurality of phase change material layers in contact with the selector material layer.
Claims20
A method for manufacturing a semiconductor memory device over a substrate, the method comprising:
- forming a plurality of conductive wires stacked in a first direction perpendicular to a surface of the substrate and separated by one or more interlayer dielectric (ILD) layers;
- forming an opening by etching the plurality of conductive wires and the one or more ILD layers;
- forming a plurality of cavities by recessing the plurality of conductive wires in the opening;
- forming a plurality of phase change material layers in the plurality of cavities so that each of the plurality of phase change material layer is formed on an end face of a corresponding one of the recessed plurality of conductive wires;
- forming a selector material layer in contact with the plurality of phase change material layers;
- and
- forming a common electrode in contact with the selector material layer.
4 more elements
A method for manufacturing a semiconductor memory device, the method comprising:
- forming a field effect transistor (FET) over a substrate;
- forming a lower interlayer dielectric (ILD) layer over the FET;
- forming a lower contact through the lower ILD layer and in contact with a drain of the FET;
- forming a lower electrode in the lower ILD layer and in contact with the lower contact;
- forming a plurality of conductive wires stacked in a first direction perpendicular to a surface of the substrate and separated by one or more interlayer dielectric (ILD) layers;
- forming an opening by etching the plurality of conductive wires and the one or more ILD layers, wherein an upper surface of the lower electrode is exposed in the opening;
- forming a plurality of cavities by recessing the plurality of conductive wires in the opening;
- forming a plurality of phase change material layers in the plurality of cavities;
- forming a selector material layer in contact with the plurality of phase change material layers;
- and
- forming a common electrode in contact with the selector material layer.
8 more elements
A method for manufacturing a semiconductor memory device, the method comprising:
- forming a plurality of field effect transistors (FETs) over a substrate;
- forming a plurality of memory elements electrically connected to drains of the FETs, respectively,
- wherein each of the plurality of memory elements is formed by:
- forming a plurality of conductive wires stacked in a first direction perpendicular to a surface of the substrate and separated by one or more interlayer dielectric (ILD) layers;
- forming an opening by etching the plurality of conductive wires and the one or more ILD layers;
- forming a plurality of cavities by recessing the plurality of conductive wires in the opening;
- forming a plurality of phase change material layers in the plurality of cavities so that each of the plurality of phase change material layer is formed on an end face of a corresponding one of the recessed plurality of conductive wires;
- forming a plurality of selector material layers in contact with the plurality of phase change material layers, respectively;
- and
- forming a common electrode in contact with the plurality of selector material layers.
7 more elements
Dependencies are inferred from the claim text.