Resistive memory device with meshed electrodes
AssigneeInternational Business Machines Corporation
InventorsTakashi Ando, Lawrence A. Clevenger, Chih-Chao Yang, Michael Rizzolo
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Abstract
A method is presented for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array. The method includes forming a conductive line within an interlayer dielectric (ILD), constructing a barrier layer over a portion of the conductive line, forming a bottom meshed electrode, depositing a dielectric layer over the bottom meshed electrode, and forming a top meshed electrode over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
Claims20
A semiconductor structure for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array, the semiconductor structure comprising:
- a conductive line constructed within an interlayer dielectric (ILD);
- a barrier layer disposed over a portion of the conductive line;
- a bottom meshed electrode;
- a dielectric layer disposed over the bottom meshed electrode;
- and
- a top meshed electrode disposed over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
A semiconductor structure for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array, the semiconductor structure comprising:
- a bottom meshed electrode;
- a dielectric layer disposed over the bottom meshed electrode;
- and
- a top meshed electrode disposed over the dielectric layer, where the bottom meshed electrode includes a plurality of first isolations films.
Dependencies are inferred from the claim text.