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US 10,950,621 B2Granted
Semiconductor substrate and semiconductor device
AssigneeToshiba Memory Corporation
InventorsTakanobu Ono, Yusuke Dohmae
Life of this patent
Estimating the term…
Abstract
A semiconductor wafer according to the present embodiment includes a plurality of semiconductor chip regions and a division region. The plurality of semiconductor chip regions have a semiconductor element. The division region is provided between the semiconductor chip regions adjacent to each other. A first stacked body is provided on the division region. The first stacked body is configured with a plurality of first material films and a plurality of second material films alternately stacked.
Claims20
A semiconductor wafer comprising:
- a plurality of semiconductor chip regions having a semiconductor element;
- a division region provided between the semiconductor chip regions adjacent to each other;
- and
- a first stacked body provided on the division region, the first stacked body being configured with a plurality of first material films and a plurality of second material films alternately stacked,
- wherein the first stacked body comprises a lower stacked body and an upper stacked body provided on the lower stacked body, and
- wherein a first insulating film has a larger thickness than each of the plurality of first material films included in the lower stacked body or the upper stacked body, the first insulating film being located between one of the second material films, which is located at an uppermost portion of the lower stacked body, and another one of the second material films, which is located at a lowermost portion of the upper stacked body.
3 more elements
A semiconductor device comprising:
- a semiconductor substrate having a first face, a second face located opposite to the first face, and a side face located between the first face and the second face;
- a semiconductor element provided on the first face;
- and
- a division region appearing on at least part of the side face, the division region having a first stacked body configured with a plurality of first material films and a plurality of second material films alternately stacked,
- wherein the first stacked body comprises a first lower stacked body and a first upper stacked body provided on the first lower stacked body, and
- wherein a first insulating film has a larger thickness than each of the plurality of first material films included in the first lower stacked body or the first upper stacked body, the first insulating film being located between one of the second material films, which is located at an uppermost portion of the first lower stacked body, and another one of the second material films, which is located at a lowermost portion of the first upper stacked body.
3 more elements
A semiconductor wafer comprising:
- a plurality of semiconductor chip regions having a semiconductor element;
- a division region provided between the semiconductor chip regions adjacent to each other;
- and
- a first stacked body provided on the division region, the first stacked body being configured with a plurality of first material films and a plurality of second material films alternately stacked,
- wherein the first stacked body comprises:
- a lower stacked body having a width in a roughly orthogonal direction to a stacked direction of the first stacked body, the width being gradually narrowed in an upward direction of the first stacked body;
- and
- an upper stacked body provided on the lower stacked body, the upper stacked body having a width in the roughly orthogonal direction to the stacked direction of the first stacked body, the width being gradually narrowed in the upward direction of the first stacked body.
5 more elements
Dependencies are inferred from the claim text.