Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei Cheng Wu, Li-Feng Teng
Life of this patent
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Abstract
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate. A second dielectric layer is disposed between the floating gate and the control gate, having one of a silicon nitride layer, a silicon oxide layer and multilayers thereof. A third dielectric layer is disposed between the second dielectric layer and the control gate, and includes a dielectric material having a dielectric constant higher than silicon nitride.
Claims20
A semiconductor device including a non-volatile memory, the non-volatile memory comprising:
- a first dielectric layer disposed on a substrate;
- a floating gate disposed on the first dielectric layer;
- a control gate;
- a select gate;
- an erase gate;
- a second dielectric layer disposed between the floating gate and the control gate, and having one of a silicon nitride layer, a silicon oxide layer and multilayers thereof;
- and
- a third dielectric layer disposed between the second dielectric layer and the control gate and including a dielectric material having a dielectric constant higher than silicon nitride,
- wherein each of the erase gate and the select gate includes a polysilicon layer and a metal layer disposed over the polysilicon layer.
A semiconductor device comprising:
- a non-volatile memory;
- and
- a logic circuit including a field effect transistor (FET), wherein:
- the non-volatile memory includes:
- a first dielectric layer disposed on a substrate;
- a floating gate disposed on the first dielectric layer;
- a control gate;
- a select gate;
- an erase gate;
- a second dielectric layer disposed between the floating gate and the control gate, and having one of a silicon nitride layer, a silicon oxide layer and multilayers thereof;
- and
- a third dielectric layer disposed between the second dielectric layer and the control gate and including a dielectric material having a dielectric constant higher than silicon nitride, wherein:
- each of the erase gate and the select gate includes a polysilicon layer and a metal layer disposed over the polysilicon layer, and
- a gate dielectric layer of the FET is made of a same material as the third dielectric layer.
A semiconductor device comprising:
- a non-volatile memory;
- and
- a logic circuit including a first field effect transistor (FET) and a second FET, wherein:
- the non-volatile memory includes:
- a first dielectric layer disposed on a substrate;
- a floating gate disposed on the first dielectric layer;
- a control gate;
- a select gate disposed on the first dielectric layer;
- an erase gate;
- a second dielectric layer disposed between the floating gate and the control gate, and having one of a silicon nitride layer, a silicon oxide layer and multilayers thereof;
- and
- a third dielectric layer disposed between the second dielectric layer and the control gate and including one or more oxide layers of Hf, Y, Ta, Ti, Al and Zr, wherein:
- a gate dielectric layer of each of the first and second FETs is made of a same material as the third dielectric layer, and
- a material of a gate electrode of the first FET is different from a material of the second FET.
Dependencies are inferred from the claim text.