Back to results
US 10,950,600 B2Granted
Semiconductor device and method of manufacturing the same
AssigneeRenesas Electronics Corporation
InventorYuji Ishii
Life of this patent
Estimating the term…
Abstract
Provided are a semiconductor device capable of preventing erroneous operation and providing a field plate effect, and a method of manufacturing the semiconductor device. In a diode, a gate electrode, a p+ source region, and an n-type body region are electrically coupled to one another. A contact region is disposed between the n-type body region and the p+ source region in a first surface of a semiconductor substrate.
Claims15
A semiconductor device, comprising:
- a semiconductor substrate having a main surface;
- a n-conductivity-type body region disposed in the main surface of the semiconductor substrate;
- a p-conductivity-type drain region disposed in the main surface of the semiconductor substrate;
- a p-conductivity-type source region disposed in the main surface of the semiconductor substrate so as to lie across the n-conductivity-type body region from the p-conductivity-type drain region;
- a gate electrode disposed in the main surface of the semiconductor substrate, and isolatedly opposed to the n-conductivity-type body region;
- a n-conductivity-type first impurity region having a higher concentration of a n-conductivity-type impurity than the body region;
- and
- an insulating layer embedded in a trench formed in the semiconductor substrate so as to surround the n-conductivity-type body region, the p-conductivity-type drain region, the p-conductivity-type source region, and the n-conductivity-type first impurity region,
- wherein the gate electrode, the p-conductivity-type source region, and the n-conductivity-type body region are electrically coupled to one another,
- wherein, in a direction from the p-conductivity-type source region toward the gate electrode, the n-conductivity-type first impurity region is disposed between the n-conductivity-type body region and the p-conductivity-type source region,
- wherein the semiconductor substrate comprises a p-conductivity-type epitaxial region formed so as to directly contact with the n-conductivity-type body region, and
- wherein the trench penetrates the p-conductivity-type epitaxial region.
9 more elements
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a p-conductivity-type epitaxial region in a semiconductor substrate;
- forming a n-conductivity-type body region in a main surface of the semiconductor substrate;
- forming a gate electrode in the main surface of the semiconductor substrate so as to be isolatedly opposed to the n-conductivity-type body region;
- forming a p-conductivity-type drain region and a p-conductivity-type source region in the main surface of the semiconductor substrate so as to lie across the gate electrode from each other;
- and
- forming a n-conductivity-type first impurity region having a higher concentration of a n-conductivity-type impurity than the n-conductivity-type body region;
- and
- forming an insulating layer embedded in a trench formed in the semiconductor substrate so as to surround the n-conductivity-type body region, the p-conductivity-type drain region, the p-conductivity-type source region, and the n-conductivity-type first impurity region,
- wherein the gate electrode, the p-conductivity-type source region, and the n-conductivity-type body region are electrically coupled to one another,
- wherein, in a direction from the p-conductivity-type source region toward the gate electrode, the n-conductivity-type first impurity region is formed so as to be disposed between the n-conductivity-type body region and the p-conductivity-type source region,
- wherein the p-conductivity-type epitaxial region is formed so as to directly contact with the n-conductivity-type body region, and
- wherein the trench penetrates the p-conductivity-type epitaxial region.
9 more elements
Dependencies are inferred from the claim text.