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US 10,950,586 B2Granted
Semiconductor devices having upper and lower solder portions and methods of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorYun-Rae Cho
Life of this patent
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Abstract
A semiconductor device includes a package substrate, a semiconductor chip on a first region of the package substrate, and a solder bump on a second region of the package substrate. The solder bump includes a core portion and a peripheral portion encapsulating the core portion. The peripheral portion includes a first segment with a first melting point and a second segment with a second melting point that is less than the first melting point.
Claims7
A semiconductor device comprising:
- a first package substrate;
- a second package substrate;
- and
- a solder joint between the first package substrate and the second package substrate,
- wherein the solder joint comprises:
- a core portion;
- a lower solder portion comprising an Sn—Ag based alloy or an Sn—Cu based alloy, the lower solder portion having a first melting point and being disposed on and contacting a first contact pad of the first package substrate;
- and
- an upper solder portion comprising an Sn—Pb based alloy or an Sn—Bi based alloy, the upper solder portion having a second melting point and being disposed on and contacting a second contact pad of the second package substrate and an uppermost surface of the lower solder portion,
- wherein the lower solder portion at least partially envelops the core portion,
- wherein the core portion has a melting point greater than the first melting point and the second melting point, and
- wherein a height of the core portion is less than one-fifth to one-third of a height of the solder joint.
9 more elements
Dependencies are inferred from the claim text.