Ring-in-ring configurable-capacitance stiffeners and methods of assembling same
AssigneeIntel Corporation
InventorsJackson Chung Peng Kong, Bok Eng Cheah, Kooi Chi Ooi, Paik Wen Ong
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AssigneeIntel Corporation
InventorsJackson Chung Peng Kong, Bok Eng Cheah, Kooi Chi Ooi, Paik Wen Ong
Estimating the term…
Ring-in-ring stiffeners on a semiconductor package substrate includes a passive device that is seated across the ring stiffeners. The ring-in-ring stiffeners are also electrically coupled to traces in the semiconductor package substrate through electrically conductive adhesive that bonds a given ring stiffener to the semiconductor package substrate. The passive device is embedded between the two ring stiffeners to create a smaller X-Y footprint as well as a lower Z-direction profile.
A method of assembling a stiffener to a semiconductor package substrate, comprising:
A computing system, comprising:
A computing system, comprising:
A computing system, comprising:
Dependencies are inferred from the claim text.
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Characterised by their interconnections: shapes or dispositions of interconnections
Arrangements for protection of devices: protecting against mechanical damage
Package substrates; Interposers; Redistribution layers [RDL]: connecting interconnections to insulating or insulated package substrates,…
Insulating or insulated package substrates; Interposers; Redistribution layers: for connecting multiple chips together
About 11 years 2 months of term left · ends 18 Dec 2037 (estimated)
This disclosure relates to semiconductor package stiffeners and to integrated capacitors for smaller form-factor packaging.
Semiconductive device miniaturization during packaging includes challenges to locate passive devices in useful proximity to other structures and to manage package physical integrity.
Disclosed embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings where like reference numerals may refer to similar elements, in which:
FIG. 1A is a top plan of a semiconductive apparatus that includes package ring stiffeners that incorporate passive components within both the semiconductor package footprint and the Z-profile according to an embodiment;
FIG. 1B is a cross-section and partial cut-away elevation of the semiconductive apparatus depicted in FIG. 1A according to an embodiment;
A die-side capacitor (DSC) is useful because it is locatable near an active device it is servicing. Disclosed embodiments include a DSC that is embedded in a ring-in-ring package stiffener. Both the DSC and the ring-in-ring package stiffener are located on the die side of a semiconductive device package. A trade-off for placing a passive device close to an active device is resolved by embedding the passive device in the ring-in-ring package stiffener. The embedded passive device presents a small X-Y footprint of useful components on the die side of the semiconductive device package, and the ring-in-ring package stiffener-embedded DSC configuration also presents a low Z-direction profile.
This disclosure includes package form-factor miniaturization that includes the elimination of the need for a larger X-Y footprint even though DSC installations are incorporated. Routing capacity is also increased by locating a given DSC at a useful distance from a semiconductive device such as a central processing unit.
By incorporating a DSC into a die-side ring-in-ring package stiffener, the land side of a package substrate is freed up for a fully populated ball-grid array for both I/O and power/ground routing. Consequently, no land-side capacitor (LSC) may be needed. Similarly, placing DSCs within the X-Y footprint as well as the Z-height of the die-side ring-in-ring stiffener, can obviate the need for a recess-in package-board structures including motherboard type structures. The die-side ring-in-ring package stiffener also provides mechanical support to facilitate thin package substrate core layer and/or coreless package stack-up, hence allowing low-Z direction package profile.