Method for integrating power chips and power electronics modules

A method for integrating electronic power chips for producing a laminated subassembly intended for an integrated electronic power device, the method comprising:

• producing first and second blanks, each of said blanks being made by laminating insulating and conductive inner layers on a plate forming a metal base, said insulating layer comprising a resin-containing stage B prepreg dielectric portions, at least one said electronic chip being implanted in one or the other of said first and second blanks, and said first and second blanks being made such that their upper lamination surfaces have matching profiles, the profiles of each of said first and second blanks defining at least one cavity which receive said integrated electronic power device;
• stacking and fitting said first and second blanks via their upper surfaces with matching profiles, such that said integrated electronic power device is contained in part the at least one cavity of the first blank and in part by the at least one cavity of the second blank;
• and
• press-fitting the first and second blanks in order to produce a laminated subassembly intended for the integrated electronic power device, said press-fitting step comprising maintaining pressure until finalization of the mechanical bonds by polymerization of the resin of the stage B prepreg dielectric portion and of the electrical bonds between the at least one electronic chip, said metal base-forming plates and said conductive inner layers.