Forming single and double diffusion breaks
AssigneeInternational Business Machines Corporation
InventorsRuilong Xie, Juntao Li, Kangguo Cheng, Junli Wang
Life of this patent
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Abstract
Fabrication methods and resulting structures for single and double diffusion breaks are provided. Aspects include forming one or more fins on a substrate, the substrate including a first region and a second region, forming a plurality of sacrificial gate structures over channel regions associated with the one or more fins, forming a single diffusion break cavity in the first region of the substrate, forming a double diffusion break cavity in the second region of the substrate, depositing a first dielectric material in the single diffusion break cavity, and depositing a second dielectric material in the double diffusion break cavity.
Claims12
A method of fabricating a semiconductor device, the method comprising:
- forming one or more fins on a substrate, the substrate comprising a first region and a second region;
- forming a plurality of sacrificial gate structures over channel regions associated with the one or more fins;
- forming a single diffusion break cavity in the first region of the substrate;
- forming a double diffusion break cavity in the second region of the substrate;
- depositing a first dielectric material in the single diffusion break cavity;
- depositing a second dielectric material in the double diffusion break cavity;
- forming an interlayer dielectric layer between each sacrificial gate structure in the plurality of sacrificial gate structures;
- and
- forming a first hard mask over the interlayer dielectric and the plurality of sacrificial gate structures;
- wherein forming the single diffusion break cavity in the first region of the substrate comprises:
- forming a patterned hard mask over the first hard mask over the first region;
- recessing a non-covered surface of the first hard mask to expose a surface of the interlayer dielectric layer and a first sacrificial gate structure, the first sacrificial gate structure comprising a first gate hard mask, a first gate sidewalls, and a first sacrificial gate material;
- and
- recessing the first gate hard mask of the first sacrificial gate structure and portions of the first gate sidewalls on opposite sides of the first sacrificial gate structure.
A method of fabricating a semiconductor device, the method comprising:
- forming one or more fins on a substrate, the substrate comprising a first region and a second region;
- forming a sacrificial gate insulation layer over channel regions associated with the one or more fins;
- forming a plurality of sacrificial gate structures over the channel regions associated with the one or more fins;
- forming a single diffusion break cavity in the first region of the substrate;
- forming a double diffusion break cavity in the second region of the substrate;
- depositing a first dielectric material in the single diffusion break cavity;
- and
- depositing a second dielectric material in the double diffusion break cavity;
- forming an interlayer dielectric layer between each sacrificial gate structure in the plurality of sacrificial gate structures;
- and
- forming a first hard mask over the interlayer dielectric and the plurality of sacrificial gate structures;
- wherein forming the single diffusion break cavity in the first region of the substrate comprises:
- forming a patterned hard mask over the first hard mask over the first region;
- recessing a non-covered surface of the first hard mask to expose a surface of the interlayer dielectric layer and a first sacrificial gate structure, the first sacrificial gate structure comprising a first gate hard mask, a first gate sidewalls, and a first sacrificial gate material;
- and
- recessing the first gate hard mask of the first sacrificial gate structure and portions of the first gate sidewalls on opposite sides of the first sacrificial gate structure.
Dependencies are inferred from the claim text.