Triblock copolymers for self-aligning vias or contacts

A structure for directed self-assembly of a back end of line (BEOL) semiconductor structure metallization layer, the structure comprising:

• a substrate;
• a lower metallization layer comprising alternating metal lines and dielectric lines disposed above the substrate;
• a triblock copolymer layer disposed above the lower metallization layer and comprising:
• a first molecular brush layer disposed on the dielectric lines of the lower metallization layer;
• a first segregated block component disposed over the dielectric lines of the lower metallization layer, the first segregated block component disposed on the first molecular brush layer;
• a second, different, molecular brush layer disposed on the metal lines of the lower metallization layer;
• and
• alternating second and third segregated block components disposed over the metal lines of the lower metallization layer, the alternating second and third segregated block components disposed on the second molecular brush layer, wherein the third segregated block component is photosensitive.

A method of fabricating an interconnect structure for a semiconductor die, the method comprising:

• forming a lower metallization layer comprising alternating metal lines and dielectric lines above a substrate;
• forming a triblock copolymer layer above the lower metallization layer;
• segregating the triblock copolymer layer to form a first segregated block component over the dielectric lines of the lower metallization layer, and to form alternating second and third segregated block components disposed over the metal lines of the lower metallization layer, wherein the second segregated block component has a different chemical composition than the first segregated block component, and the third segregated block component has a different chemical composition than the first and second segregated block components, wherein the alternating second and third segregated block components have a ratio of X:1, second segregated block component to third segregated block component, wherein X is greater than 1, wherein the third segregated block component has a columnar structure surrounded by the second segregated block component, and wherein the third segregated block component is photosensitive;
• and
• irradiating and developing select locations of the third segregated block component to provide via openings over the metal lines of the lower metallization layer.

A method of fabricating an interconnect structure for a semiconductor die, the method comprising:

• forming a lower metallization layer comprising alternating metal lines and dielectric lines above a substrate;
• forming a first molecular brush layer on the dielectric lines of the lower metallization layer;
• forming a second, different, molecular brush layer on the metal lines of the lower metallization layer;
• subsequent to forming the first molecular brush layer and the second molecular brush layer, forming a triblock copolymer layer above the lower metallization layer;
• segregating the triblock copolymer layer to form a first segregated block component over the dielectric lines of the lower metallization layer, and to form alternating second and third segregated block components disposed over the metal lines of the lower metallization layer, wherein the alternating second and third segregated block components have a ratio of X:1, second segregated block component to third segregated block component, wherein X is greater than 1, wherein the third segregated block component has a columnar structure surrounded by the second segregated block component, and wherein the third segregated block component is photosensitive;
• and
• irradiating and developing select locations of the third segregated block component to provide via openings over the metal lines of the lower metallization layer.