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US 10,950,314 B2Granted
Semiconductor device
AssigneeToshiba Memory Corporation
InventorsShinya Okuno, Shigeki Nagasaka, Toshiyuki Kouchi
Life of this patent
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Abstract
A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO.
Claims14
A semiconductor device comprising:
- a first memory chip which includes a first memory cell array;
- a second memory chip which includes a second memory cell array, a via which conducts from an upper surface of the second memory chip to a lower surface of the second memory chip, and a first conductive member, the second memory chip being connected to the first memory chip through the via;
- and
- a semiconductor chip which includes a second conductive member, a first buffer which receives data read from the first memory chip or the second memory chip through the via, a second buffer which receives the data from the first buffer, and an input/output circuit which outputs the data received from the second buffer,
- wherein the first conductive member of the second memory chip and the second conductive member of the semiconductor chip are bonded together,
- the second buffer is located closer to the input/output circuit than the first buffer.
3 more elements
Dependencies are inferred from the claim text.