System and method for cryogenic hybrid technology computing and memory

A cryogenic system, configured to operate at a temperature below 10K, comprising:

• a plurality of superconducting computational elements, configured to operate at a clock rate of greater than 20 GHz;
• an array of selectable spintronic memory cells, each respective memory cell comprising a Josephson junction, having a thin magnetic layer barrier, and a selecting device;
• and
• an interface circuit configured to communicate between the superconducting digital processor and the array of spintronic memory cells through single flux quanta pulses.

A computing method configured to operate at cryogenic temperatures below 10 K, comprising:

• clocking a superconducting digital processor, comprising a plurality of superconducting computational elements, at a clock rate of greater than 20 GHz;
• retrieving information under control of the superconducting digital processor from elements of an array of spintronic memory cells;
• and
• communicating the retrieved information from the elements of the array of spintronic memory cells to the superconducting digital processor.