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US 10,949,738 B1Granted
Tunable memristor noise control
AssigneeHewlett Packard Enterprise Development LP
InventorsSuhas Kumar, John Paul Strachan
Life of this patent
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Abstract
A memristor matrix comprising a crossbar array, a multiplexer and a noise control circuit. The noise control circuit may comprise a threshold comparator and a threshold feedback circuit to receive a first threshold and a second threshold and output a threshold signal based, in part, on an output of the threshold comparator.
Claims19
A memristor matrix, comprising:
- a crossbar array;
- a multiplexer;
- and
- a noise control circuit, comprising:
- a threshold comparator;
- and
- a threshold feedback circuit to receive a first threshold and a second threshold and output a threshold signal based, in part, on an output of the threshold comparator, the threshold feedback circuit comprising:
- a first D latch receiving an output of the noise control circuit and outputting a first intermediate output and a second intermediate output;
- a second comparator comparing the first intermediate output to the second intermediate output and outputting a third intermediate output;
- a second D latch receiving the third intermediate output and outputting a first control signal and a second control signal;
- and
- a threshold determination circuit receiving the first threshold, the second threshold, the first control signal, and the second control signal, and outputting the threshold signal.
9 more elements
A method, comprising:
- receiving, at a noise control circuit during a first clock cycle, a first input signal;
- comparing, at a first comparator of the noise control circuit, the first input signal to a first selected threshold;
- outputting, from the first comparator, a first output signal based on the comparing the first input signal to the first selected threshold;
- determining, at a threshold determination circuit and based in part on the output signal, a second selected threshold for a second clock cycle;
- receiving, at the noise control circuit during the second clock cycle, a second input signal;
- comparing, at the first comparator, the second input signal to the second selected threshold;
- and
- outputting, from the first comparator, a second output signal based on the comparing the second input signal to the second selected threshold.
5 more elements
A tunable hysteretic feedback circuit, comprising:
- a first comparator comparing an input signal to a threshold signal and outputting a first output of the hysteretic feedback circuit;
- a first D latch receiving the first output and outputting a first intermediate output and a second intermediate output;
- a second comparator comparing the first intermediate output to the second intermediate output and outputting a third intermediate output;
- a second D latch receiving the third intermediate output and outputting a first control signal and a second control signal;
- and
- a threshold determination circuit receiving a first threshold, a second threshold, the first control signal, and the second control signal, and outputting the threshold signal.
3 more elements
Dependencies are inferred from the claim text.