Semiconductor package floating metal checks

A system for checking floating metals in a laminate structure, the system having a processor coupled to a memory, the processor configured to:

• receive a semiconductor package design comprising a plurality of laminate layers, the laminate layers each comprising one or more metal shapes and one or more vias;
• receive floating metal rules comprising maximum internal via-via and external edge-via distances allowed within voltage shapes;
• map each of the metal shapes and vias to one or more cells in an array, wherein each cell in the array comprises a number and each digit in the number corresponds to a unique location on a laminate layer in the semiconductor package design;
• and
• determine whether the vias satisfy the floating metal rules.

A computer program product for checking floating metals in a laminate structure, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:

• receive a semiconductor package design comprising a plurality of laminate layers, the laminate layers each comprising one or more metal shapes and one or more vias;
• receive floating metal rules comprising maximum internal via-via and external edge-via distances allowed within voltage shapes;
• map each of the metal shapes and vias to one or more cells in an array, wherein each cell in the array comprises a number and each digit in the number corresponds to a unique location on a laminate layer in the semiconductor package design;
• and
• determine whether the vias satisfy the floating metal rules.