Through-silicon vias in integrated circuit packaging
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsFong-yuan Chang, Chin-Chou Liu, Chin-Her Chien, Cheng-Hung Yeh, Po-Hsiang Huang, Sen-Bor Jan, Yi-Kan Cheng, Hsiu-Chuan Shu
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Abstract
The present disclosure describes structures and methods for a via structure for three-dimensional integrated circuit (IC) packaging. The via structure includes a middle portion that extends through a planar structure and a first end and a second end each connected to the middle portion and on a different side of the planar structure. One or more of the first end and the second end includes one or more of a plurality of vias and a pseudo metal layer.
Claims20
A method, comprising:
- connecting one or more of a pseudo metal layer and a plurality of vias to an end of a through-silicon-via (TSV) to form an extended TSV structure;
- defining routing properties of the one or more of the pseudo metal layer and the plurality of vias, wherein a routing property of the pseudo metal layer comprises being non-connectable to an interconnect and a routing property of the plurality of vias comprises being connectable to the pseudo metal layer, the TSV, and the interconnect;
- and
- in response to a connection pattern of the pseudo metal layer and the plurality of vias being compatible with respective routing properties, connecting the end of the extended TSV structure to the interconnect.
A non-transitory computer-readable medium containing computer-executable program for, when being executed by a processor, implementing a method, comprising:
- connecting one or more of a pseudo metal layer and a plurality of vias to an end of a through-silicon-via (TSV) to form an extended TSV structure;
- defining routing properties of the one or more of the pseudo metal layer and the plurality of vias, wherein a routing property of the pseudo metal layer comprises being non-connectable to an interconnect and a routing property of the plurality of vias comprises being connectable to the pseudo metal layer, the TSV, and the interconnect;
- and
- in response to a connection pattern of the pseudo metal layer and the plurality of vias being compatible with respective routing properties, connecting the end of the extended TSV structure to the interconnect.
A computer system, comprising:
- a memory configured to store instructions;
- and
- a processor, that when executing the instructions, is configured to perform operations comprising:
- connecting one or more of a pseudo metal layer and a plurality of vias to an end of a through-silicon-via (TSV) to form an extended TSV structure;
- defining routing properties of the one or more of the pseudo metal layer and the plurality of vias, wherein a routing property of the pseudo metal layer comprises being non-connectable to an interconnect and a routing property of the plurality of vias comprises being connectable to the pseudo metal layer, the TSV, and the interconnect;
- and
- in response to a connection pattern of the pseudo metal layer and the plurality of vias being compatible with respective routing properties, connecting the end of the extended TSV structure to the interconnect.
Dependencies are inferred from the claim text.