Softmax circuit

A circuit arrangement comprising:

• difference calculation circuitry configured to calculate differences between combinations of elements, zk−zj, of a vector Z of length N for N≥2, 1≤j≤N, and 1≤k≤N;
• first lookup circuitry coupled to the difference calculation circuitry, the first lookup circuitry configured to lookup and output representations of exponential values, ezk−zj associated with the differences in response to input of the differences, wherein e is the base of the natural logarithm;
• N adder circuits coupled to the first lookup circuitry, wherein each adder circuit is configured to sum a subset of the exponential values output from the first lookup circuitry and a value of 1, and output a sum that denotes a denominator of a plurality of denominators of a softmax function;
• and
• second lookup circuitry coupled to the N adder circuits, the second lookup circuitry configured with quotients and configured to lookup and output quotients associated with the plurality of denominators as results of the softmax function.