Fast page fault handling process implemented on persistent memory
AssigneeIntel Corporation
InventorsJames A. Boyd, Robert J. Royer, Jr., Lily P. Looi, Gary C. Chow, Zvika Greenfield, Chia-Hung S. Kuo, Dale J. Juenemann
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Abstract
A method is described. The method includes receiving notice of a page fault. A page targeted by a memory access instruction that resulted in the page fault residing in persistent memory without system memory status. In response to the page fault, updating page table information to include a translation that points to the page in persistent memory such that the page changes to system memory status without moving the page and system memory expands to include the page in persistent memory.
Claims20
A non-transitory machine readable storage medium containing program code that when processed by a computing system causes the computing system to perform a method, comprising:
- receiving notice of a page fault, a page targeted by a memory access instruction that resulted in the page fault residing in a persistent memory without system memory status;
- and,
- in response to the page fault, updating page table information to include a translation that points to the page in the persistent memory such that the page changes to system memory status without moving the page and system memory expands to include the page in the persistent memory.
A computing system, comprising:
- a plurality of processing cores;
- a system memory;
- a memory controller coupled between the system memory and the plurality of processing cores;
- a network interface;
- a mass storage device, the mass storage device containing program code that when processed by the computing system causes the computing system to perform a method, comprising:
- receiving notice of a page fault, a page targeted by a memory access instruction that resulted in the page fault residing in a persistent memory without system memory status;
- and,
- in response to the page fault, updating page table information to include a translation that points to the page in the persistent memory such that the page changes to system memory status without moving the page and a system memory expands to include the page in the persistent memory.
An apparatus, comprising:
- a semiconductor chip comprising a processing core having an instruction execution pipeline, the instruction execution pipeline comprising a memory management unit, the semiconductor chip comprising a memory controller to interface with a persistent memory, the memory management unit to update page table information in response to a page fault to include a translation that points to a page in the persistent memory such that the page changes to system memory status without moving the page and a system memory expands to include the page in the persistent memory, the page targeted by a memory access instruction that resulted in the page fault.
Dependencies are inferred from the claim text.