Bits register for synonyms in a memory system
AssigneeInternational Business Machines Corporation
InventorsMartin Recktenwald, Willm Hinrichs
Life of this patent
Estimating the term…
Abstract
In an approach to tracking and invalidating memory address synonyms in a memory system includes establishing a bits register for a first virtual address in a memory system, the bits register having synonym fields representing each bit of a first synonym identifier portion of the first virtual address, the first virtual address being mapped to a physical address; determining, for a second virtual address mapped to the physical address, the second virtual address having a second synonym identifier portion, a set of differing bits within the second synonym identifier portion compared to the first synonym identifier portion; and registering the set of differing bits in the bits register.
Claims20
A method for managing memory address synonyms, the method comprising:
- establishing a bits register for a first virtual address in a memory system, the bits register having synonym fields representing each bit of a first synonym identifier portion of the first virtual address, the first virtual address being mapped to a physical address;
- determining, for a second virtual address mapped to the physical address, the second virtual address having a second synonym identifier portion, a set of differing bits within the second synonym identifier portion compared to the first synonym identifier portion;
- and
- registering the set of differing bits in the bits register.
A computer program product for managing memory address synonyms, the computer program product comprising:
- a computer readable storage medium and program instructions stored on the computer readable storage medium, the program instructions comprising:
- program instructions to establish a bits register for a first virtual address in a memory system, the bits register having synonym fields representing each bit of a first synonym identifier portion of the first virtual address, the first virtual address being mapped to a physical address;
- program instructions to determine, for a second virtual address mapped to the physical address, the second virtual address having a second synonym identifier portion, a set of differing bits within the second synonym identifier portion compared to the first synonym identifier portion;
- and
- program instructions to register the set of differing bits in the bits register.
A computer system comprising:
- one or more computer processors;
- one or more computer readable storage media;
- program instructions stored on the one or more computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising:
- program instructions to establish a bits register for a first virtual address in a memory system, the bits register having synonym fields representing each bit of a first synonym identifier portion of the first virtual address, the first virtual address being mapped to a physical address;
- program instructions to determine, for a second virtual address mapped to the physical address, the second virtual address having a second synonym identifier portion, a set of differing bits within the second synonym identifier portion compared to the first synonym identifier portion;
- and
- program instructions to register the set of differing bits in the bits register.
Dependencies are inferred from the claim text.