Synchronization and exchange of data between processors
AssigneeGraphcore Limited
InventorsDavid Lacey, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Matthew David Fyles
Life of this patent
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AssigneeGraphcore Limited
InventorsDavid Lacey, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Matthew David Fyles
Estimating the term…
A system comprising: a first subsystem comprising one or more first processors, and a second subsystem comprising one or more second processors. The second subsystem is configured to process code over a series of steps delineated by barrier synchronizations, and in a current step, to send a descriptor to the first subsystem specifying a value of each of one or more parameters of each of one or more interactions that the second subsystem is programmed to perform with the first subsystem via an inter-processor interconnect in a subsequent step. The first subsystem is configured to execute a portion of code to perform one or more preparatory operations, based on the specified values of at least one of the one or more parameters of each interaction as specified by the descriptor, to prepare for said one or more interactions prior to the barrier synchronization leading into the subsequent phase.
A processing system comprising:
A method of operating a system comprising a first subsystem having a first processor, and a second subsystem having a second processor, the method comprising:
A non-transitory computer-readable storage medium having stored thereon computer-executable code configured so as when run on a system comprising a first subsystem having a first processor and a second subsystem having a second processor, performs operations of:
Dependencies are inferred from the claim text.