System and method to accelerate reduce operations in graphics processor
AssigneeIntel Corporation
InventorsYong Jiang, Yuanyuan Li, Jianghong Du, Kuilin Chen, Thomas A. Tetzlaff
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Abstract
Embodiments described herein provide a system, method, and apparatus to accelerate reduce operations in a graphics processor. One embodiment provides an apparatus including one or more processors, the one or more processors including a first logic unit to perform a merged write, barrier, and read operation in response to a barrier synchronization request from a set of threads in a work group, synchronize the set of threads, and report a result of an operation specified in association with the barrier synchronization request.
Claims19
An apparatus comprising:
- one or more processors to:
- receive a barrier message associated with a barrier synchronization request, the barrier message including one or more source operands and an identifier of a specified operation;
- perform an operation including a merged write-barrier-read operation in response to the barrier synchronization request from a set of threads in a work group, synchronize the set of threads, wherein the merged write-barrier-read operation is performed to enable accelerated reduction operations associated with a set of map operations to write local data for global calculation, and the merged write-barrier-read operate is further performed to facilitate completion of atomic operations and ready the global calculations to determine one or more convergence conditions;
- and
- report results associated with performance of the operation, wherein the results satisfying the one or more convergence conditions facilitate termination of iterations, wherein the results failing the one or more convergence conditions facilitate continuation of the iterations.
A method comprising:
- receiving a barrier message associated with a barrier synchronization request, the barrier message including one or more source operands and an identifier of a specified operation;
- performing an operation including a merged write-barrier-read operation in response to the barrier synchronization request from a set of threads in a work group, synchronize the set of threads, wherein the merged write-barrier-read operation is performed to enable accelerated reduction operations associated with a set of map operations to write local data for global calculation, and the merged write-barrier-read operate is further performed to facilitate completion of atomic operations and ready the global calculations to determine one or more convergence conditions;
- and
- report results associated with performance of the operation, wherein the results satisfying the one or more convergence conditions facilitate termination of iterations, wherein the results failing the one or more convergence conditions facilitate continuation of the iterations.
At least one non-transitory machine-readable medium having stored thereon instructions which, when executed by a processing device, causes the processing device to perform operations comprising:
- receiving a barrier message associated with a barrier synchronization request, the barrier message including one or more source operands and an identifier of a specified operation;
- performing an operation including a merged write-barrier-read operation in response to the barrier synchronization request from a set of threads in a work group, synchronize the set of threads, wherein the merged write-barrier-read operation is performed to enable accelerated reduction operations associated with a set of map operations to write local data for global calculation, and the merged write-barrier-read operate is further performed to facilitate completion of atomic operations and ready the global calculations to determine one or more convergence conditions;
- and
- report results associated with performance of the operation, wherein the results satisfying the one or more convergence conditions facilitate termination of iterations, wherein the results failing the one or more convergence conditions facilitate continuation of the iterations.
Dependencies are inferred from the claim text.