System, apparatus and method for context-based override of history-based branch predictions

At least one non-transitory computer readable storage medium having stored thereon instructions, which if performed by a machine cause the machine to perform a method comprising:

• receiving, in a control circuit of a processor from a first set of predictors, a plurality of predictions for a first branch instruction, each of the plurality of predictions obtained from a corresponding one of the first set of predictors;
• generating an index based at least in part on at least some of the plurality of predictions and at least a portion of an instruction address of the first branch instruction;
• accessing a predictor table using the index to obtain a counter value;
• and
• in response to the counter value exceeding a threshold value, outputting a final prediction for the first branch instruction based on the counter value.

A system comprising:

• a processor including at least one core, the at least one core including:
• an instruction fetch circuit to fetch instructions;
• and
• a branch predictor coupled to the instruction fetch circuit to predict a direction of branch instructions, the branch predictor comprising:
• a global history predictor having a plurality of tables to store global predictions for a corresponding history duration, each of the plurality of tables to output one of a plurality of global predictions each associated with a first branch instruction;
• and
• a second predictor comprising a context table having a plurality of entries each to store a context prediction for a corresponding branch instruction, wherein the branch predictor is to override the plurality of global predictions output from the global history predictor for the first branch instruction with a final prediction comprising a first context prediction output from the second predictor for the first branch instruction based on a comparison between the first context prediction and a threshold value, the branch predictor to provide the final prediction to the instruction fetch circuit to cause the instruction fetch circuit to fetch a target of the first branch instruction using the final prediction, wherein the branch predictor is to generate an index to index into the context table based at least in part on at least some of the plurality of global predictions for the first branch instruction and an instruction address for the first branch instruction;
• and
• a system memory coupled to the processor.