Integrated protocol analyzer configured within automated test equipment (ate) hardware

An apparatus for diagnosing a cause of failure using automated test equipment (ATE), the apparatus comprising:

• a computer system comprising a system controller, wherein the system controller is communicatively coupled to a site module board comprising a tester processor and a programmable logic device, wherein the system controller is operable to transmit instructions to perform a test on a device under test (DUT) to the tester processor and the programmable logic device;
• and
• the programmable logic device operable to be communicatively coupled to the DUT and operable to generate commands and data for executing the test on the DUT, and wherein the programmable logic device comprises a protocol analyzer module and an interface core programmed on the programmable logic device, wherein the interface core is operable to generate signals to communicate with the DUT using a protocol associated with the DUT and wherein the protocol analyzer module is operable to:
• monitor data and command traffic associated with the protocol in the interface core;
• filter information from the data and command traffic relevant to a user to create a filtered subset of data;
• store the filtered subset of data results in a memory associated with the protocol analyzer module;
• and
• transmit the results upon request to an application program associated with the protocol analyzer module executing on the system controller.

A tester comprising:

• a system controller for controlling a test program for testing a plurality of DUTs;
• a plurality of modules coupled to the system controller and operable to interface with and test the plurality of DUTs, wherein each module comprises a site module board, and wherein each site module board comprises:
• a tester processor coupled to communicate with the system controller to receive instructions and data therefrom in accordance with the test program;
• and
• a plurality of programmable logic devices coupled to the tester processor, each programmable logic device comprising an interface core and operable to generate test data for application to a respective DUT, and to receive and to compare test data generated by the respective DUT, and wherein the interface core of each programmable logic device is operable to be programmed to communicate with the respective DUT using a communication protocol compatible with the respective DUT, and wherein each of the programmable logic devices comprises a protocol analyzer module, wherein the protocol analyzer module is programmed on the programmable logic device and is operable to:
• monitor data and command traffic associated with the protocol in the interface core;
• perform an action on the data and command traffic in response to a trigger;
• store a subset of data resulting from the action in a memory associated with the protocol analyzer module;
• and
• transmit the results upon request to an application program associated with the protocol analyzer module executing on the system controller.