High resolution digital trigger detector

A digitizer comprising:

• A. a clock former adapted to receive an applied periodic reference clock signal and in response thereto, provide
• i. a trigger detector (TD) sampling clock at a TD clock former output, characterized by a first clock frequency,
• ii. a high speed ADC (HS-ADC) sampling clock at a HS-ADC clock former output, characterized by a second clock frequency,
• wherein a ratio of the frequency of the HS-ADC sampling clock signal and the frequency of the TD sampling clock signal is a rational number, and
• B. a high speed analog to digital converter (HS-ADC) having
• i. an HS-ADC signal input adapted to receive an analog signal-to-be-processed,
• ii. an HS-ADC sampling clock input adapted to receive the HS-ADC sampling clock from the HS-ADC clock former output, and
• iii. an HS-ADC output,
• wherein the HS-ADC is operative to sample an analog signal-to-be-processed received at the HS-ADC input with an HS-ADC sampling clock received at the HS-ADC sampling clock input, and provide on the HS-ADC output, a sequence of HS-ADC samples at the HS-ADC output,
• C. a digital trigger detector, operative in real time, including:
• i. inputs adapted to receive:
• 1. the TD sampling clock, and
• 2. a trigger signal representative of one or more events-of-interest, and
• ii. an event detector adapted to detect from the trigger input signal, the one or more events-of-interest, and generate a corresponding one or more requests for a digital trigger associated with the respective detected one or more events-of-interest,
• iii. operative in response to the detection of the one or more events-of-interest,
• a. a pulse former responsive to the one or more requests adapted to generate a trigger pulse for each detected event, wherein the respective trigger pulses are characterized by a predetermined pulse length, pulse shape, and stability over time, and
• b. a lowpass filter operative to process the trigger pulses to provide anti-aliasing and shaping of the respective trigger pulses,
• c. a trigger detector (TD) analog to digital converter operative to (i) receive the processed trigger pulses at a TD-ADC input and (ii) apply the TD sampling clock to a TD-ADC sampling clock input, whereby a TD sequence of digitized samples is applied to a TD-ADC output, wherein the TD sequence of digitized samples for each processed trigger pulse is a digital representation of a detected digital trigger, and
• d. a discrete Fourier transform (DFT) processor operative to perform a discrete Fourier transform on the TD sequence yielding a plurality of DFT harmonics associated with the respective digitized samples of the TD sequence, and based on the DFT harmonics, determine a time-position for a digital trigger associated with the respective detected one or more events-of-interest.