Porous Cu on Cu surface for semiconductor packages

A method of manufacturing a semiconductor package, the method comprising:

• forming a surface on a plurality of metal leads and which comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS (International Annealed Copper Standard), a metallized surface on a semiconductor die and which comprises Cu and has a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS, and/or a surface on an interconnect and which comprises Cu and has a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS;
• forming micropores in one or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS, the micropores having a diameter in a range of 1 μm to 10 μm;
• and
• attaching the semiconductor die to the plurality of metal leads by the interconnect.

A leadframe, comprising:

• a plurality of metal leads having a surface which comprises Cu, a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS (International Annealed Copper Standard);
• and
• micropores formed in the surface of the plurality of metal leads and having a diameter in a range of 1 μm to 10 μm,
• wherein the surface of the plurality of metal leads with the micropores comprises plasma-deposited Cu dust on a Cu alloy and/or has a surface roughness in a range of 1.5 μm and 20 μm.

A method of manufacturing a leadframe, the method comprising:

• forming a plurality of metal leads having a surface which comprises Cu, a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS (International Annealed Copper Standard);
• and
• forming micropores in the surface of the plurality of metal leads, the micropores having a diameter in a range of 1 μm to 10 μm, and
• wherein:
• the surface of the plurality of metal leads is formed by an electrodeposition process and forming the micropores comprises introducing hydrogen bubbles as part of the electrodeposition process;
• or
• forming the surface of the plurality of metal leads comprises depositing, by plasma deposition, Cu dust on a Cu alloy.

A method of manufacturing a leadframe, the method comprising:

• forming a plurality of metal leads having a surface which comprises Cu, a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS (International Annealed Copper Standard);
• forming micropores in the surface of the plurality of metal leads, the micropores having a diameter in a range of 1 μm to 10 μm;
• and
• roughening the surface of the plurality of metal leads to a surface roughness in a range of 1.5 μm and 20 μm.

A semiconductor package, comprising:

• a plurality of metal leads;
• and
• a semiconductor die attached to the plurality of metal leads by an interconnect;
• wherein a surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS (International Annealed Copper Standard),
• wherein one or more of the surfaces which comprises Cu and has a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also comprise micropores having a diameter in a range of 1 μm to 10 μm, and
• wherein:
• the semiconductor package further comprises a metal clip attached to a terminal of the semiconductor die at a side of the semiconductor die facing away from the plurality of leads, and a surface of the metal clip comprises Cu, has a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS and comprises micropores having a diameter in a range of 1 μm to 10 μm;
• and/or
• the metallized surface of the semiconductor die is attached to a metal die paddle and comprises Cu, has a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS and comprises micropores having a diameter in a range of 1 μm to 10 μm.