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US 10,911,269 B2Granted
Decision feedback equalizer circuit with transistor mobility change compensation
AssigneeIntel Corporation
InventorsAnup J. Deka, Kambiz R. Munshi
Life of this patent
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Abstract
An apparatus is described. The apparatus includes a decision feedback equalizer circuit having a summation circuit. The summation circuit has a differential pair that includes first and second transistors coupled to a current source. The current source is to draw a current through the first and second transistors. The decision feedback circuit also includes a circuit to adjust the current to compensate for a change in electron mobility of at least one transistor of the current source.
Claims15
An apparatus, comprising:
- a decision feedback equalizer circuit comprising a summation circuit, said summation circuit comprising an input differential pair comprising first and second transistors coupled to a first current source, said first current source to draw a first current through said first and second transistors, said decision feedback equalizer circuit comprising a circuit that provides a steady state triode region bias to each of a plurality of transistors arranged in a DC series circuit to adjust a reference current to compensate for a change in electron mobility of at least one transistor of said first current source, said first current source coupled to said circuit to receive said reference current to help establish said first current, said summation circuit comprising a feedback differential pair comprising third and fourth transistors coupled to a second current source, said second current source to draw a second current through said third and fourth transistors, said second current source coupled to said circuit to receive said reference current to help establish said second current.
An apparatus, comprising:
- a double data rate memory interface comprising a data signal wire;
- a decision feedback equalizer circuit coupled to said data signal wire to receive a data signal propagated on said data signal wire, said decision feedback equalizer circuit comprising a summation circuit, said summation circuit comprising an input differential pair comprising first and second transistors coupled to a first current source, said first current source to draw a first current through said first and second transistors, said decision feedback equalizer circuit comprising a circuit that provides a steady state triode region bias to each of a plurality of transistors arranged in a DC series circuit to adjust a reference current to compensate for a change in electron mobility of at least one transistor of said first current source, said first current source coupled to said circuit to receive said reference current to help establish said first current, said summation circuit comprising a feedback differential pair comprising third and fourth transistors coupled to a second current source, said second current source to draw a second current through said third and fourth transistors, said second current source coupled to said circuit to receive said reference current to help establish said second current.
A computing system, comprising:
- a plurality of processing cores;
- a system memory;
- a memory controller coupled between the plurality of processing cores and the system memory;
- a double data rate memory bus coupled between the system memory and the memory controller, the double data rate memory bus comprising a data signal wire;
- a decision feedback equalizer circuit coupled to said data signal wire to receive a data signal propagated on said data signal wire, said decision feedback equalizer circuit comprising a summation circuit, said summation circuit comprising an input differential pair comprising first and second transistors coupled to a first current source, said first current source to draw a first current through said first and second transistors, said decision feedback equalizer circuit comprising a circuit that provides a steady state triode region bias to each of a plurality of transistors arranged in a DC series circuit to adjust a reference current to compensate for a change in electron mobility of at least one transistor of said first current source, said first current source coupled to said circuit to receive said reference current to help establish said first current, said summation circuit comprising a feedback differential pair comprising third and fourth transistors coupled to a second current source, said second current source to draw a second current through said third and fourth transistors, said second current source coupled to said circuit to receive said reference current to help establish said second current.
2 more elements
An apparatus, comprising:
- a circuit to provide a linear signal that tracks mobility change of at least one transistor within the circuit, the circuit comprising biasing circuitry to bias the at least one transistor in its triode region, the circuit coupled to a second circuit that is to receive the linear signal, the second circuit to linearly adjust a current reference signal based on the linear signal, said second circuit coupled to first and second current sources of first and second differential pairs respectively so that said current reference signal helps establish first and second currents respectively pulled through said first and second differential pairs by said first and second current sources, the first differential pair being an input differential pair of a summation circuit, said second differential pair being a feedback differential pair of said summation circuit.
Dependencies are inferred from the claim text.